Recent content by 8protons

I've seen across a lot of forums people warning others that their M.2_x slots will take up lanes from their PCIE16_x, effectively making it an 8x. Is this unfounded?

So the M.2 + PCIe16 runs directly to the CPU, and the rest run directly to the North and/or South bridges? I thought I've seen posts/blogs that PCI used for network cards or other M.2 slots will share the same lanes as the one as the PCIE16?

Wont that add up to more than 20 lanes though? Which not a lot of CPU's support? 4 lanes (M.2_1 slot) + 16 lanes (PCIEX16) + 24 (Z590)? How does that work?

This is a bit confusing because "the slot closest to the CPU" on new boards is actually a Gen 4 M.2 slot. I think this is where a lot of confusion is coming from - for myself included. By taking up this M.2_1 slot (Key M) PCIe 4.0 x4, would you be killing bandwidth of your main GPU by running a...

In the manual to this ASUS Prime Z590-a motherboard, there is a page dedicated to shared bandwidth on Page XI. What is strange to me is that the PCIEX4 is unspecified. It's clear from the image, charts, and reading the manual that: PCIEX16_1, PCIEX16_2, and PCIEX16_3 share lanes M.2_2 and...