AMD A10-4600M ''Trinity'' 3DMark 11 Performance Leaked

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I wonder, when will integrated GPUs come with their own VRAM? A mid range GPU with a mid-latency 1600 MHz RAM can stand toe-to-toe with a high end GPU armed with high-latency 1066 MHz RAM. An integrated GPU with 256-512MB of GDDR5 can easily dominate other intergrated GPUs.
 
The 7660 is probably just a hair slower than the Nvidia 9800gs in my Asus G50VT. Pretty cool. We'll see how it turns out ..

Does anyone know if the Trinity GPU can overclock itself like the cores can?
 
That isn't what he said at all. I got from it that he was saying that an intergrated APU would do more with intergrated and dedicated GDDR5 graphics memory that was of higher quality instead of using shared system memory or lower quality memory as they do now. Since that has been proven repeatedly with dedicated graphics cards I would say that he is dead on with his comment and you kinda look like the noob.
 
FYI nothing is leaked unless company thinks its a good idea to see reaction, when we have our meetings with Intel reps they showed us slides and such but only told us verbaly about new things they were working on, I would usually see those slides on websites marked "leaked" :)
 
@frozonic
Bad Day was talking about vram. It's video ram; usually built onto the graphics board which is usually much faster and higher performance than the ram you put on the motherboard. He seems to be wondering if companies might one day have something like that built right on the die (as part of the chip) rather than use the standard ram on the computer. It would probably be a small amount, but it would maybe run really fast with low latency. I think it's a fine concept.

The issue right now seems to be that there's less of a direct connection between an integrated graphics chip (makes for higher latency) and its associated memory than there would be on a discreet board which has everything built together with high end parts.
 
Nice graphic! They used the lightest weight CPU with the most underclocked GPU Intel put out.
 
Just on the discussion or vram and integrated graphics, a while back i was looking up patents for something totally unrelated (wind turbines) and just for fun plugged in AMD into the search, turns out they had submitted an application for a method to allow the cpu to use gddr memory, so, the future looks bright my friends.
 
i am not sure if i fully understood your comment but.... you are saying that RAM matters a lot in GPU performance? that a High - end ram kit can boost your mid-end gpu performance to keep up with a high end gpu?! if so, you are a noob 😀
Click to expand...

Ironically, you're the noob here. :ange:
 


I don't think that would actually help much. The majority of memory is spent storing massive textures, right?
 


Yes and no.

Large amounts of memory are used for texture storage, just like large amounts of system memory are used for program data. Cacheing still helps in both situations.

GPU's are really just dedicated vector CPU's, they process large amounts of geometry math, they even have their own L1 / L2 cache internally. Thing is their are something like 300~400+ processors on each GPU die, sometimes much more then that. Their relatively simple processors yet because they are so many of them they can accomplish large workloads in a fraction of the time it would take a regular general purpose CPU. The downside is that with so many processors require massive data feeds to keep them busy. That is why GPU memory bandwidth has such a large impact on GPU's performance, I would venture to say bandwidth has a larger impact that latency on rendering. GDDR5 is just DDR3 with a wider bus width and prefetch buffers.

Local on-die GPU memory would greatly enhance APU performance. It'll never reach what a medium to high end dGPU could reach, just by virtue of scaling, but it'll be more then enough for what most people will ever use it for. Makes one helluva beastly mobile gaming system.
 
I wonder how much it'd increase the motherboard cost if AMD mandated that they have two GDDR5 chips soldered on for access by the APU.

I'm guessing that routing the traces, and the need for more pins on the APU/socket are the main things that have kept this from happening already.
 
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