photonboy :
The ONLY way now to make a notable jump in IPC is to break backwards compatibility with legacy code which is what is RUMORED they are doing. Even then, would we gain 20%? No idea.
With the amount of refinement that has gone into the instruction decoders over the past 20 years to keep x86 competitive against all other high-performance ISAs that have come and many gone in both performance and power efficiency, I would be surprised if switching ISAs at this point would yield much in the way of performance improvements that aren't achievable by further architecture and compiler tweaking.
Once you fully embrace multi-threaded software design though, there is no point in going to extreme lengths to extract the absolute maximum IPC per thread and that's why GPU, HPC and some server-oriented architectures use a larger number of much simpler cores with many more hardware threads instead to keep the cores' execution units busy without deep out-of-order execution, speculative execution and other expensive tricks. Making those simpler cores even simpler by ditching backwards compatibility, now that is something ditching ISA compatibility would be worth doing for.