8350rocks :
How about the 8% they missed the CPU target and the 24% they missed the GPU target?
They didn't hit the CPU target because of clockspeed, and they didn't hit the GPU target because of clockspeed.
Both of those factors correlate to several things:
Target TDP limits (influenced by bulk vs. FD-SOI)
Target power consumption limits (influenced by bulk vs. FD-SOI)
Clockspeed headroom (influenced by bulk vs. FD-SOI)
The issue is, bulk substrate means higher leakage, which means more power is required to reach the same clockspeed that can be achieved on FD-SOI because of the insulator.
This means, basically, that while Kaveri runs at 3.7 GHz at 95W TDP, Richland runs at 4.1 GHz + Turbo at 100W TDP or 10% faster on a less advanced process with larger/fewer transistors.
Now, your 20% performance gain just took a 10% hit because of loss of clockspeed. See the difference?
High leakage in bulk substrate is why Intel uses so many tricks to make FinFET work on bulk. Like 3D transistors, and all the other super expensive to R&D stuff they use in their fab just to keep clockspeeds competitive on bulk process.
Additionally, bulk is far more temperature sensitive to power consumption at lower voltages than FD-SOI. If you crank the vcore up on a haswell chip, it gets hot fast. You can turn up the vcore on a FX chip and it doesn't require nearly as drastic cooling to run cooler than the Intel option.
These are all factors that you have not addressed and lead directly into the issues AMD had with bulk process.
They are also why I believe my contact mentioned directly that they would not pursue HEDT on bulk substrate, and would not be doing bulk beyond 28nm.
In the end, if AMD keeps this up, we all lose. FinFET is not the way of the future, it's many times more costly to develop a FinFET on bulk with all the technology Intel has, to compete, rather than take a simple planar UTBB FD-SOI that competes without all the dog and pony show tricks to get there.
But what do I know about CPUs? You clearly are the master of everything about CPUs, if nothing else because you said so, and no one else could possibly be right about something.
FX > Kaveri
i)
They didn't miss 8% of CPU target, because AMD never revealed the frequencies. In my BSN* article I included a table with three different combinations of frequencies. Final Kaveri CPU freq. is only a 3% behind one of them.
The same about the GPU frequencies. AMD never gave them.
ii)
I already explained you that only the GDDR5 version of the HD7750 has 900MHz clocks. The version with DDR3 has 800MHz clocks. Kaveri has 720MHz.
All them bulk.
The large drop in iGPU performance from original expectations is explained by AMD dropping the GDDR5 support. The original 1050GFLOP Kaveri was considering GDDR5 memory. BSN* has copies of the original docs reporting GDDR5 support. I already mentioned that someone has said me that the Kaveri die has a disabled GDDR5 IMC. Which means that the decision to abandon GDDR5 was taken very late.
iii)
Trinity and Richland are 100W. Kaveri is limited to 95W TDP. Limit both Trinity and Richland to 95W max and say me about how many you drop frequencies.
My bet is that a 95W rated Trinity would be ~3.7GHz and Richland ~3.9--4.0GHz
iv)
Kaveri has larger and powerful iGPU than Trinity/Richland. Those 100W TDP for the APU are distributed between CPU and GPU.
Take Trinity/Richland and substitute their iGPU with a Kaveri-level iGPU. If the total TDP continue being of 100W, you have to cut the CPU frequencies by some extension.
v)
Sure that Kaveri would achieve higher clocks in SOI. Has someone said the contrary here?
NO But are you aware that Glofo has not ready 28nm SOI? AMD decision to go bulk has been a success. I don't understand why you guys don't accept it.
vi)
We don't know turbo frequencies nor its aggressivity. What if AMD follows Intel way of lower base clocks and higher turbo clocks?
The last rumor is that AMD is considering >4.0GHz turbo.
vii)
In my BSN* article I didn't considered a 20% IPC gain over PD, but a 20% minus a 5% for unknows. Palying safety, this means that my predictions of i5 level of performance are off by about a 3%.
Now, benchmarks leaked after I wrote my article say that SR is a 31% faster than PD and speculate about higher gains in the final silicon
It is still too soon. There are so many unknows.
viii)
It is evident than FinFET is the future. AMD is already tapping out chips on 14nm bulk FinFET and some foundries are running the first tests of 10nm FinFET.
But hey you are the expert that said us that Kaveri was SOI...