"with both adopting 6 MB L3 Cache" means total L2 + L3 cache of 6mb or L3 cache increase from 2mb to 6 MB. A 4mb L3 cache increase is kinda big for just a refresh.
If I understood it correctly the 2 mb cache on the current phenoms is 'too small' because of size/power/heat problems, they wanted to make it bigger but couldn't. The 45 nm version is more like it should have been from the day one.
I thought that the 45nm amd's would be AM3 socket...
They should be compatible with AM2+ but then as usual with a phenom AM2+ on an AM2 board- you don't get to full Hypertransport speeds available when the phenom is on its desired platform.