AMD Details 'Ambidextrous' Solution That Bridges x86, ARM

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x86 + arm + gcn + hsa + hUMA + trueaudio + etc...

A lot of integrated action in there. Hopefully it will go well. Probably it remains unused opportunity... There are so many things that requires full implementation by programmers, that it is almost scary thing to think about. All good ideas that only need support from program developers.
 
Somehow I don't see how this is supposed to work... What does "pin-compatible" mean? If its just being able to put either x86 or ARM processor into the mobo then its useless... If you can have both and switch between them then this may have some uses but its still quite useless... If those two processors will be able to work side by side that's the only cease when this would be somewhat useful, but only once we have an operating system that would support this...
 
Is this just a SOC with separate x86 and ARM CPUs built in? Or is it really a processor that is compatible with both architectures? In other words, is half the chip just unused all of the time?
 
This is counter productive, what we need is an architecture that can run both instruction sets with very little overhead ... OR traditional desktop OSes need to migrate to support ARM processors .... OR mobile OSes need to abandon the ARM architecture . Short of any of these 3 options, it's all short term solutions.
 
So I guess this implies the possibility of enthusiast CPU coolers for ARM which if that's the case AMD has a winner up it's sleeve.
 
Very confusing article, but I believe they just mean an upcoming SOCKET will be compatible with either x86 or ARM. So you can use the same motherboard for either.

I guess this could lower manufacturing costs a bit, but it doesn't seem like a big deal to me.
 


what they mean is that the chip will have both an x86 cpu ....and.... an ARM cpu on the same die, the ARM cpu will be an A57 so that should give an idea of performance.
 

I'm pretty much certain they mean one socket/motherboard that can accommodate either an x86-based SoC or an ARM-based SoC. AMD has used the same bus across different architectures at least one before when they bought out DEC and decided to reuse the Alpha 21264's EV6 bus for the early Athlons.

If a single chip had both x86 and ARM, there would be no point in mentioning that the socket is pin-compatible across x86 and ARM compute.
 


you know...i think you're right...rereading the article it seems that the isn't to have 2 cpus on one die, but to have one pin compatible for both architectures.

I still think for consumer facing products we should be consolidating architectures instead of maintaining this divergence.

 
It is an either or in 2015. Then in 2016 it will be both. Tomshardware disclose too little information. Read these:

http://www.anandtech.com/show/7989/amd-announces-project-skybridge-pincompatible-arm-and-x86-socs-in-2015

http://www.anandtech.com/show/7990/amd-announces-k12-core-custom-64bit-arm-design-in-2016

Actually Mullins APU released last month has something called AMRTrustzone that has an embedded single ARM core within already.

http://www.anandtech.com/show/7974/amd-beema-mullins-architecture-a10-micro-6700t-performance-preview
 

Plenty of stuff have one or more ARM or other form of CPU/microcontroller to handle self-contained tasks. Many high-security microcontrollers have dual microcontrollers where the "outer" microcontroller handles the interface with the external world while the "inner" microcontroller handles secure transactions with no externally accessible input or output.

Having cores dedicated to different instruction sets sharing duties as main application processor on the other hand sounds like a pretty wild gamble. I am having a hard time imagining system administrators being pleased with mixing multiple binary images in a single system. If the goal is security, security that has to be tight enough as to require the use of completely independent cross-checking on a different CPU architecture would probably require the elimination of potential side-channel attacks from those CPUs sharing the same system bus, RAM, IO, etc. which means the checks-and-balance would need to be on physically isolated independent systems. If it was big.LITTLE, mixing low-power x86 cores with high-power ones could do that too without the need to mix instruction sets.

Guess we'll see in 2016.
 
AMD has used the same bus across different architectures at least one before when they bought out DEC and decided to reuse the Alpha 21264's EV6 bus for the early Athlons.

AMD didn't buy DEC. AMD only licensed the EV6 bus from DEC, and as you say used it in Athlons. It was Compaq who bought out DEC in 1998. In 2001 HP bought out Compaq, and since HP had already committed to get out of processor design, the deal included the transfer of the Alpha design division from Compaq to Intel.
 
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