AMD has an ace up its sleeve - magic 6 pins

dragonsprayer

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http://www.tgdaily.com/content/view/37816/135/

AMD smoke amd mirrors last year it was the "true" quad this year its a magic 6 pins that mysteriously over clock the cpu! Is it a new method of sb clocking? of coarse not!

Well is there anything to the 6 unknown pins?

sounds like some kind of noobie oc for masses - buy a black get a blacker?
 

JDocs

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Well now, instead of running hotter and slower than a Q6600 AMD owners can spend some more cash and then run at a similar speed and much high heat disipation....

Wait they'll need to upgrade their cooling as well... He he... Starting to make the Q6600 look like a much cheaper/cooler/faster solution for decent quad core performance.

At least with this AMD's tri-cores can now hope to out run Intel's E7200...
 

Flakes

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depends on the overclocking, you have to remember there all the same chip, if they overclock with the multiplyer there not gonna increase heat dissipation by much. what worrys me is all the people that have already overclocked there systems.. wont it screw them up?
 

JDocs

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Flakes, actually a Q6600 at say 400x8 does definately generate less heat than the same chip at 400x9 and yes it probably will their screw them over or just override their settings.
 

Amiga500

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I don't believe a word of it.


If I recall correctly, it was Theo Valich that said AMD could double their hypertransport speeds on the K8 or something, effectively doubling their performance overnight to compete with Conroe.
 

doomturkey

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You are comparing the heat dissipation of a chip at 3.2ghz and a chip at 3.6ghz...
What he's saying is compare how hot a chip @ 400x9 is compared to 450x8.
 

JDocs

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450*8 should be warmer (as a whole through out the computer) as it places more stress on the motherboard and depending on the the RAM speed is set (in most cases with a devider) the RAM as well generating more heat on those components. Additionally the higher FSBs with lower multipliers generally generate more heat from than the same speed acheived via a lower FSB and higher multi, well from what I understand.
 


Dude the Q6600 always has. But I remember reading a few reviews of the Phenom BEs that were being OC'ed and they would hit a certain limit depended on the processor) where their power consumption would go up by quite a bit.

Personally I think its crap. It may be true but I think its not. Although there are a few pins that you can do something with on a Q6600 to have it run on a 1333FSB stock.
 

dragonsprayer

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maybe i missunderstood this 6pin thing

i thought this was just fast oc - so its actually moving part of the hypertrasport to the sb?

all my sarcasim aside - i really do not understand what the 6 pins do - hence my thread magic 6 pins.

but know i think they are passing part of the data through the sb to kinda like hyper threading?
 

Slobogob

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Huh? What has Hyperthreading to do with the Southbridge?
 

dragonsprayer

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sorry

i think the amd systems works by splitting the data flow and running part through the nb and part through the sb

the parts are reassembled in the cpu (hun?)

this way if the memory controller of nb are a problem they can by pass it hence the extra pins
 

endyen

Splendid

Umm, no.
First off, all instructions to the south bridge, are routed through the north bridge.
In case you haven't heard, AMD has an On Die Memory Controller. This ODMC has nothing to do with the nb.
Oh, and by the way, if you are going to read "articles" by Theo, I recommend you invest in a very large bag of salt.
 

Flakes

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had not thought of it like that, turbo button here we come :)
 


You must forgive him. He is now an AMD fan more than Intel and is pretty much a noob. So either way ne is new to the AMD arena. I think it was b/c he thinks Intel wont allow OCing for Nehalem but whatever.

Either way I still find this hard to believe.
 
If AMD had an ace, they would have played it already.


Yay! Tom's is no longer going to base their articles off of those stupid things called "facts".

Welcome to the new Inquirer my friends.



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yomamafor1

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This shouldn't be that hard to implement, as long as you have the instruction written in the chipset, or simply supported by the BIOS.

EDIT: I'm not sure what Theo meant by "overclocking through the south bridge". AFAIK, south bridge operates independently to processor. Sounds to me more like a platform rewarding system: if you purchase AMD's latest SB, they reward you by giving you a significant automatic overclock.

EDIT2: Actually if you continue to investigate Theo's report, the likelihood of such implementation is getting smaller. Agena 9850 will likely dissipate over 200W of heat at 3.2Ghz. Under that circumstance, can the stock cooler hold it back? On the other hand, if AMD can easily overclock even the Tolliman to 3.2Ghz, why haven't they done so, and selling them for higher ASP?
 

Harry-Plopper

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Geesh

If the Phenom didnt have such a crappy start and now they say its got special talents then its like saying the 939 has got six extra pins for overclocking...

Who cares...

AMD lost this race with a blind donkey with one leg and a crusted saddle...

Its like saying we gave this donkey an injection that will make it last a few more days.....

I wish that AMD would stop this bs poop and bring us a chip we all deserve from someone who innovated the pc...

I was gonna get a 4870x2 but not im gonna get a new Nvidia card when it comes out...

Ive given up now.. really given up

Im gonna go for the black helmet number, become a sith lord and join the dark side...

Im gonna jump ship so far that there is no comming back as the rubber dingy came with it...

9450 Quad, 8GB and quad hard disk boot here i come....
 
It ain't magic.

Microprocessor pin assignments include bidirectional data bus lines, IRQ requests, power, etc.

Most importantly in this case microprocessor pin assignments include clock signal input/output.

The higher the clock rate the more difficult it becomes to keep the clock signal in phase. Of course the south bridge is important to overclocking. South bridge phase lock loop timing factors are most likely the reason the Phenoms are having OC problems.

The best way to keep in phase with an OC is to bump the volts when you hit the wall.

If the SB750 fixes the PLL issues it is not beyond reason that a core clock of 200MHz with a 16x multi will do 3.2GHz at stock volts.
 

yomamafor1

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The problem is, according to Theo, all 8000 series Tolliman and 9000 series Phenom can benefit from this. Given that most of them are multiplier locked, the only way is to increase core clock.