AMD questions current multi-core trend

[sandmanwn]

Anyway, back on point...I'd be interested to see if an integrated cpu/gpu could be an effective ethusiast solution. Or, a socketed gpu enthusiast solution. It could probably work if they can make a memory interface fast enough. I can totally see the benefit of an integrated co-processor solution for things like ethernet, audio DSP, and maybe even an integrated onboard XOR and RAID chip so as not to need to steal cycles from the cpu. Regardless of how AMD goesabout it, it's gonna make for some interesting products and implementations.

Not to mention the overall reduction in space your PC takes up not having all those individual chips and expansion cards sitting on top of that 9.5x11 motherboard.

Seems like PC's are growing as of late instead of getting smaller.

 

[MU_Engineer]

No. There is a dimorphism. Performance PCs are getting bigger, yes, but the "standard" desktop is shrinking and has been since the late 1990s due to everything being integrated. How many mid-tower ATX cases do you see on the shelves of your local big box store that aren't specifically gaming machines? Pretty few. They are at most a two-bay mini-tower and many are SFF machines, some even with laptop CPUs in them.

 

[CaptRobertApril]

I think you're taking the concept too far. What they mean is that the same building blocks for a PDA will apply to the PC and MP3 /MPEG player.

The first fusion GPU will be in a laptop as integrated graphics. They won't be able to really achieve "Fusion" with a "game-level" product until 45nm when the process size will allow for the same 64 shaders on the die.

This will of course need the higher bandwidth of 2GHz DDR3 so that's a ways off yet.

I expect Barcelona to ship with an HTX "Stream" Processor, and the refresh in Jan 08 should see a socketed version using an eDRAM buffer like Xbox360.

There are already PCIe coProcs and the market just needs to increase in the HPC space and cHT will be a staple in servers before CSI even comes out. Even PCIe 2.0 won't have enough interconnect bandwidth to compete with HT3.

You imagination is fascinating but I don't think that would be true.

It's all speculation at this point since product launches have a habit of surprising even the most experienced observers. We'll have to wait and see. The THG article didn't go into any more detail than that and I haven't seen anything else that clarifies that "targeted hw" statement any further. I have no use for portable electronics or game consoles, so if these particular developments affect that field, it's a big fat hohum...

 

[elpresidente2075]

this is why i went off this quote from this guy is why i stated my point

That sentence doesn't make any sense. Is your primary language English? Or are you drunk? If you are a native English speaker, there must be something wrong with your cohesive sentence making skills right now, as I can't even figure out what you mean by that.

 

[elpresidente2075]

Could you at least add some punctuation?

 

[elpresidente2075]

If your native language wasn't English, I'd cut you some slack, as the translation is pretty rough sometimes. But I see you have no excuse. Perhaps you should put your own comma in there. Sorry, coma...

Edit:
Sorry, its just the way I work. If I see something that doesn't make any sense I point it out and try to correct it. In the case of your most second most recent post here, I read what you wrote 10+ times and still couldn't figure out exactly what you were trying to say.

 

[elpresidente2075]

I been talkin' to you, bro. I can understand posters who actually make coherent posts.

I understood you loud and clear about your FSB for AMD thoughts.

I am also waiting for you to actually state your point that you alluded to several posts back. I believe there are several of us that are also waiting for said point.

If you want to argue about spelling:
If you want to spell better, but just can't figure out how, get Firefox 2. It has built in spell check. If you spell something wrong, you are alerted to the error and are encouraged to correct it by a red dotted line underneath the word. You must use a different source, however, to find the correct spelling of the word.

If it only did grammar check on the fly like Word does, it would solve many a problem here, I believe.

 

[elpresidente2075]

Let me spell it out:

It has been proven here today that you don't really know what you thought you knew. Your point (under much scrutinizing to actually see what it was) was flawed, and your poor attempt at making AMD seem the lesser company by having a lesser technology was completely and utterly incorrect.

I did not mention race in any post, only natural language. There are many German-speaking fellows here who often have translation problems.
I only mentioned spelling and punctuation because your sentence, attempting to defend yourself, didn't make any sense, and still does not.
My post about spell check was meant to be retarded, as I know you have it in you to actually spell, you just choose not to do it for some reason or another.

 

[Pippero]

The interconnect between the CPU and the IMC is not a bus.
Even though it might be informally called so.
A bus is a shared communication link among different subsystems (for the definition, i'll refer you to "(Hennessy-Patterson) Computer Architecture-A Quantitative Approach" which is the "bible" of computer architecture design in college).
Bus, point-to-point interconnect, crossbar, butterfly, they all share similar concepts, but also have different characteristics and uses.
Besides, you can't compare an internal bus or interconnect (in chip) with an external one; internal buses have to travel distances which are several orders of magnitude shorter than the external ones, as such can have many times higher bandwidth and many times lower latencies.
The IMC is an advantage over the FSB (as i said, just look at K7 VS K8 ), yet is no "ultimate weapon" which alone can make a CPU prevail.
And yes, putting more cache on the CPU and having smart prefetching (which minimizes bus traffic) are effective in compensating this disadvantage.
But then again, there are situations where no large cache and no smart prefetching can make up for lack of memory latency and bandwidth: suppose that the CPU has to work with huge amounts of data scattered all accross memory (poor spatial locality); here prefetching fails and the cache thrashes.
Or suppose that you have to process a lot of data, but you just have to read it once and write it once (poor temporal locality), again cache won't help you much (but prefetch could, if such data exhibits spatial locality).
However these scenarios are more typical of server / database / scientific applications (that's why K8 does still well in the enterprise market, and AM2 Opterons do so well in SpecFP_rate tests.

 

[1Tanker]

wy dnt yu gys cal a troos?

 

[dean7]

wy dnt yu gys cal a troos?

Hah... priceless.

Yah, therrs no poynt in fiyting abowt this stuf. Peepole can figyure out what im trying to say just fine.

 

[dean7]

looks like elpresidente2075 is an unrealistic goal for this guy. cant even understand posters on this website

He can understand posts. He just can't understand your posts. You might want to check this book out:

http://www.amazon.com/English-Grammar-Dummies-Geraldine-Woods/dp/0764553224/sr=8-1/qid=1166204226/ref=pd_bbs_sr_1/103-0879236-7851068?ie=UTF8&s=books

I'm seriously trying to help you here.

 

[Randy77]

Despite the capability of more threads, the average home user really isn't going to know what to do with much more than 6-8 cores. Too many programs will need to be entirely re-written to properly take advantage of a general processor, where as a speciallized one could do a far better job at it's task.

However we get there, more cores, clock speed increases, or the same number of cores with a few specialized support chips thrown in, people will want the additional processing power. They won't care how many cores they have, but then will know how fast (or slow) their stuff runs.

How many people today would be content running a single core 1GHz processor? The programmers will come up with a way to tap it. I agree that the programming changes required aren't simple, but then, neither is the design of the processors. They will get it done.

 

[1Tanker]

Despite the capability of more threads, the average home user really isn't going to know what to do with much more than 6-8 cores. Too many programs will need to be entirely re-written to properly take advantage of a general processor, where as a speciallized one could do a far better job at it's task.

However we get there, more cores, clock speed increases, or the same number of cores with a few specialized support chips thrown in, people will want the additional processing power. They won't care how many cores they have, but then will know how fast (or slow) their stuff runs.

How many people today would be content running a single core 1GHz processor? The programmers will come up with a way to tap it. I agree that the programming changes required aren't simple, but then, neither is the design of the processors. They will get it done.Yep....it's human nature to always want more/better.

 

[m25]

i would question it to if i didnt have a competative product.
they are just trying to stall so they lose market share slower.
the potential of multicore systems is great. my guess is they are forseeing supply issues by making multicore products and want to try to dodge the bullet

Interesting enough the same arguments were said about AMD during the Ghz war.
...and they were right.

 

[killmess]

wy dnt yu gys cal a troos?

What is troos?

 

[elpresidente2075]

you didnt even know what FSB is.

Looks to me like you didn't either, so what are you lol'ing about?

@killmess:
I believe that was a stab at how I was treating beerandcandy earlier.

@beerandcandy:
Sure, I'll call a truce. Whaddya think?

 

[HotFoot]

Anyone involved in a frivolous argument about spelling and grammar in this thread is making themselves "sound foolish". The point of this thread is to find out what people think about specialised cores being integrated into the CPU (or APU). I think it's a great idea, and I'm mostly interested in hearing about the implications in terms of running software. If you want to argue about poor grammar, get your own thread.

 

[1Tanker]

you dont even know what you are talking about
i explained exactly what it was
you are making yourself sound foolish with your posts

you guys can type what ever you want and claim what ever you want about this but u are all wrong

even amd claims they use a fsb
here is a link
http://www.amd.com/us-en/Processors/SellAMDProducts/0,,30_177_861_3876,00.html#10228

they even claim it makes their processor faster
lols


please appologize for being a jerk


Q: Why did AMD decide to increase the front-side bus frequency on the AMD Athlon XP processor from 333 FSB to 400 FSB?

A: AMD is committed to offering the highest performance processors in the marketplace. As a result, AMD responded to customer requests for increased performance. We have determined that an FSB frequency increase will benefit our customers by improving data throughput to the processor, and thus increase performance across the broadest range of software applications.

The advanced 400 FSB of the AMD Athlon XP processor 3200+ increases maximum data throughput into and out of the processor by up to 20 percent over the previous 333 FSB. This can result in significant performance gains on all types of software, including office productivity, digital media and 3-D gaming. On a variety of industry-standard software benchmarks, the AMD Athlon XP processor 3200+ outperforms competing desktop PC processors by an average of 6 percent.

I'd say it's safe to assume, that when you said AMD uses an FSB...everyone was talking about Athlon64(not Athlon XP). The discussion wasn't about previous architectures... and by adding in the FSB thing.. you're reaching.

 

[Pippero]

all athlon based systems use a fsb (not sure how 4x4 is setup though)
64 is no different than xp

http://www.amd.com/us-en/assets/content_type/DownloadableAssets/presspres.pdf

the fsb is what all processors use to get paged data from the ram
not a reach at all

how am i the only one on the forumz that knows this?

edit:
i was thinking more on this and can see why its confusing with amd using the hypertransport configuration for the FSB it can seem confusing

No, you're the only one on these forumz NOT to know this.
And the link that you've just shown is about K7 (Athlon XP/MP), not K8 (Athlon 64)
The Athlon 64 does not have a FSB, it has an internal point to point interconnect between the IMC and the CPU cache.
The term "bus" is often loosely used in an improper way.
The concept of a FSB is that several CPUs are supposed to share it.
Ok, so:
in ancient times, there was just the memory bus.
The memory bus is where the CPU(s) and the caches exchanged data with main memory.
Then Intel with the Pentium Pro created the DIB (Dual Independent Bus) architecture to increase memory throughput, by splitting the memory bus into a FSB (memory and CPUs) and RSB (CPU and cache).
But the concept of a bus, strictly speaking, is that of a shared communication device.
What this means is that you should be theoretically able to plug on the bus "any" number (taken with a grain of salt) of devices (masters or slaves) and the bus would act as a communication medium among them.
This has advantages (flexibility), and disadvantages (the total usable bandwidth instead of increasing, decreases with the number of bus participants, due to bus contention and protocol overhead).
For example, USB is a bus.
AGP is not a bus, is a point to point interconnect (between North Bridge and GPU).
Ethernet originally was a bus, i.e. with 10Mbit on coaxial cable, you could just plug as many computers as you wanted to the cable (up to a maximum due to electrical and physical limits).
However, when using Ethernet as a bus, the total bandwidth (not just the individual bandwidth) would decrease with an increase in the number of users plugged into the bus, due to conflicts to access the bus, and the protocol to deal with them.
To improve performance, Ethernet moved to a switched network, which in fact uses it as a simple point to point interconnect.
In case of the memory "bus" of K8, there is only the CPU and the IMC which are directly interconnected.
So it's not a bus, and its efficiency is always full.
Now, with Intel CPUs (and previous AMD CPUs), all CPUs installed in a system would be sharing a FSB which make them communicate among themselves, and with memory.
With K8 instead, each CPU is connected with its own memory through its IMC, and it's connected to the other CPUs through HT links (which are also point to point interconnects).
So there's no "bus sharing", no conflicts, no contention, full interconnect bandwidth and latency usable.
That's why, the K8 does not have a FSB.

 

[killmess]

The point of this thread is to find out what people think about specialised cores being integrated into the CPU (or APU). I think it's a great idea, and I'm mostly interested in hearing about the implications in terms of running software.

I think more cores in 1 cpu it's good thing, but I hate a little QFX, the most boring thing of build a pc it's put cpu and cooler(hsf) in place, imagine do that twice(QFX). :roll:

 

[elpresidente2075]

Thank you for making the point so clear while I was away.