News AMD Ryzen Threadripper 3000 Listed: 32 Cores, Up to 4.2 GHz

donner

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Nov 11, 2010
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Please engage your brain when reporting on rumors. The L2 cache can't be right. L2 cache is per core. And, we can be certain that the 3960X is not a different chiplet than 3970X. In addition, we can be pretty certain that we don't have different silicon with 1MB L2 per core instead of 512KB per core like both Ryzen 3000 and Rome. Which throws everything into doubt. More likely some one was testing the Threadripper page with bogus numbers.
 
Nov 6, 2019
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Please engage your brain when reporting on rumors. The L2 cache can't be right. L2 cache is per core. And, we can be certain that the 3960X is not a different chiplet than 3970X. In addition, we can be pretty certain that we don't have different silicon with 1MB L2 per core instead of 512KB per core like both Ryzen 3000 and Rome. Which throws everything into doubt. More likely some one was testing the Threadripper page with bogus numbers.
512KB per core is the correct amount with Zen 2 afaik
 
Jun 13, 2019
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Should be 12mb and 16mb L2 (unless they have managed to sneak in 1mb per core) zen 2 core has 512kb of L2 cahce

Both having 32mb is quite incorrect, even if they had 1mb L2 per core as one is a 24 core part

L3 cache should be correct as amd don't norm chop off the L3 cache (16x16mb L3 per ccx, 32mb per chiplet and there is 8 of them)
 
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L3 cache should be correct as amd don't norm chop off the L3 cache (16x16mb L3 per ccx, 32mb per chiplet and there is 8 of them)
That depends on how many chiplets AMD included in these. There are 48 and 64-core Epyc processors with 256MB of L3 cache across 8 chiplets, but the 24 and 32-core models have just 128MB of L3 cache across 4 chiplets. Technically, AMD could use 8 chiplets with half or more of the cores disabled on each, but that doesn't seem like a particularly efficient or cost-effective way to do things. More likely, these processors will have 128MB of L3 just like their Epyc counterparts, and more cache would be reserved for higher core-count models utilizing more chiplets, should they arrive to the platform.

I agree with the suggestion that someone was probably just getting the product page ready with filler information while waiting for the actual specifications to get released, especially considering the other specs like socket, memory channels and PCIe lanes were all ripped from the AM4 platform, making them clearly wrong. If a good chunk of the information was made up, then it was probably all made up, and this isn't something Tom's Hardware should have bothered reporting on. Especially since AMD will likely be announcing the actual specifications in another day or so, making this little more than a useless, clickbait article.
 
Jun 13, 2019
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That depends on how many chiplets AMD included in these. There are 48 and 64-core Epyc processors with 256MB of L3 cache across 8 chiplets, but the 24 and 32-core models have just 128MB of L3 cache across 4 chiplets. Technically, AMD could use 8 chiplets with half or more of the cores

actual specifications in another day or so, making this little more than a useless, clickbait article.
That would make more sense on the 24-32 core parts (like they did with older threadripper parts having 2 broken dies and 2 working ones) so having 128mb L3 cache I guess probably would happen for 24-32 core part with 4 chiplets enabled only for 24>3 and 32>4 cores per ccx (L3 128mb), the 48 core part would have to be the full 8 chiplets enabled at 3 cores per ccx (L3 256mb)

The larger combined size L3 does not mean much as its L3 is 16mb per ccx and has to copy that data to other ccx L3 cache over infinity fabric if same data needs to be worked on another ccx group (not unified like Intel where the total is available to all cores typically)

Guess we find out in 2-3 days
 
Nov 6, 2019
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Thank you Zhiye for the nice article and the latest information. 256 MB L3 is a ton of cache! I would buy one for sure but mine is still too new to replace.
 
And as expected, a day later, pretty much none of these "rumored" specifications ended up being accurate. : P

Rumored 3970X
Cores/Threads: 32 / 64
Base/Boost: 3.0 / 4.2 GHz
L2 Cache: 32 MB
L3 Cache: 256 MB
TDP: 250 W

Actual 3970X
Cores/Threads: 32 / 64
Base/Boost: 3.7 / 4.5 GHz
L2 Cache: 16 MB
L3 Cache: 128 MB
TDP: 280 W

Rumored 3960X
Cores/Threads: 24 / 48
Base/Boost: 3.5 / 4.7 GHz
L2 Cache: 32 MB
L3 Cache: 256 MB
TDP: 250 W

Actual 3960X
Cores/Threads: 24 / 48
Base/Boost: 3.8 / 4.5 GHz
L2 Cache: 12 MB
L3 Cache: 128 MB
TDP: 280 W

Aside from core counts, literally everything else is wrong. Just as expected, the specs match the Epyc Server processors these CPUs are based off of, with the exception of higher clocks and in turn power draw.
 

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