News AMD Zen 6 CPUs Are Reportedly Based On The 2nm Process Node

DaveLTX

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I whole heartedly disagree with the writer’s claim that zen 5c is similar to Intel e-cores. Zen 5c is a density optimized version of zen 5 with 1/2 L3 cache that utilizes simultaneous multi-threading. Nothing like the Intel e- cores.

And on top of that, it is fully ISA compatible with Zen 5 down to having AVX512 still.
Unlike gracemont or whatever mont they're following up with
 
I whole heartedly disagree with the writer’s claim that zen 5c is similar to Intel e-cores. Zen 5c is a density optimized version of zen 5 with 1/2 L3 cache that utilizes simultaneous multi-threading. Nothing like the Intel e- cores.
And on top of that, it is fully ISA compatible with Zen 5 down to having AVX512 still.
Unlike gracemont or whatever mont they're following up with
Which makes one question, why do they even bother at all?!
If they only have less cache then the only thing that they could possibly do is be slower than the normal cores while still using pretty much the same amount of power...
 

Neilbob

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Amd milking way... one launch per year, same product but with 5% increase performance. New bugs... "Pay more for the bugs of tomorrow".

Where do you come up with the nonsense you so often post? I genuinely wonder. Or are you just being a parody of a troll or something?

None of the Ryzen launches (Zen+ notwithstanding) have had performance increases as low as 5%, and every bit of information we've had about forthcoming products doesn't suggest otherwise.

And one product per year or 18 months feels like a decent launch cadence to me. I'd be annoyed to buy the 'latest, greatest thing' from one certain company only to have it totally superseded about 6 months later.

As for bugs, of course there are some of those. Intel has them too. They're often called errata.
 
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ottonis

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Who would have thought that a processor successor to a 3nm one is a 2nm one!?
Well, things are much more complicated than they may appear on the surface.
With Apple being #1 TSMC customer and Intel booking more and more production capacities at TSMC, be it to stay competitive or just to hurt production volumes of its competitors, this whole industry has become the proverbial shark tank. I wouldn't even be surprised if Intel (or nvidia) payed TSMC very good money just to stretgically delay AMD's access to its latest and greatest process nodes. I don't say that this is actually happening but just that it wouldn't surprise me the least, given Intel's (and nvidia's) track record of shady business practices.
From that perspective, it is of course a relevant information which process nodes will be used (and when!) for the upcoming Zen-generations.
 
None of the Ryzen launches (Zen+ notwithstanding) have had performance increases as low as 5%, and every bit of information we've had about forthcoming products doesn't suggest otherwise.
Zen+ was a 3% IPC increase (brought the IPC almost on par with Sky Lake) but a 10% overall performance boost due to boost clocks and staying at higher boost levels for longer than Zen 1.
 
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Which makes one question, why do they even bother at all?!
If they only have less cache then the only thing that they could possibly do is be slower than the normal cores while still using pretty much the same amount of power...
Zen 4c server CPUs will increase core count from 96 > 128 per socket at the same power envelope as 96. The performance will be lower depending on application but no worse than Zen 3.
 

usertests

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And on top of that, it is fully ISA compatible with Zen 5 down to having AVX512 still.
Unlike gracemont or whatever mont they're following up with
Intel added AVX and AVX2 to Gracemont, kind of a huge change there. It would be funny to see Intel add hyperthreading and/or AVX512 to E-cores in the future, but somehow keep the die area small.

Inb4 AVX1024.

Amd milking way... one launch per year, same product but with 5% increase performance. New bugs... "Pay more for the bugs of tomorrow".
Zen 2, Zen 3, Zen 4, probably Zen 5, all around ~25% performance increases from increased IPC and clock speeds.


Which makes one question, why do they even bother at all?!
If they only have less cache then the only thing that they could possibly do is be slower than the normal cores while still using pretty much the same amount of power...
Cache uses a lot of die area, and taking away half of it doesn't necessarily kill performance. See Cezanne Zen 3 with 16 MB L3 vs. Vermeer Zen 3 with 32 MB L3. A 5700G has most of the performance of a 5800X, and has increased cache and cache per core from the Renoir chips that came before it.

I think they are also using some unspecified tricks to pack the Zen 4C cores closer together, maybe necessitating lower clock speeds. Regardless of why the clock speeds are lower, power consumption can plummet because of it.

The end result is something with more multi-core performance in a given area, like Intel's E-cores. Time will tell how good it is, and if it's any good for consumers (see rumored Zen 4 + Zen 4C variant of Phoenix).
 

Amdlova

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"The 7950X uses significantly more power than the other processor to reach the above clock speeds. Yeah, the 7950X is scoring 49% better in multicore compared to the 5950X, but it’s also using 69% more power to achieve this – not so nice in this case." 69% morr power where is the 25% IPC? Lol
 

DaveLTX

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Which makes one question, why do they even bother at all?!
If they only have less cache then the only thing that they could possibly do is be slower than the normal cores while still using pretty much the same amount of power...
You speak as if L3 cache doesn't draw majority of the power.
They do.
Zen 4c was designed specifically for the cloud computing sector and the added cache does not benefit much, so scaling back the cache actually keeps most of the performance plus increases density since again, cache takes up most of the area of a CPU core now.
 

DaveLTX

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Zen+ was a 3% IPC increase (brought the IPC almost on par with Sky Lake) but a 10% overall performance boost due to boost clocks and staying at higher boost levels for longer than Zen 1.
Zen+ was 3% IPC because it shortened the L3 latency but that's all because they wanted it as a backup in case Zen 2 was delayed (and it was)
but Zen 2 and 3 and 4 certainly didn't deliver only 3% IPC or anywhere close to that, double digits easily everytime and cranking up the clocks all the time
"The 7950X uses significantly more power than the other processor to reach the above clock speeds. Yeah, the 7950X is scoring 49% better in multicore compared to the 5950X, but it’s also using 69% more power to achieve this – not so nice in this case." 69% morr power where is the 25% IPC? Lol
Well you are actually dumb so i'll break it down for you
I have a 5900X and 7900X
At 140W 5900X runs at 4.2-4.3ghz while 7900X hits 4.7ghz while IPC is increased subtantially. :)

You are going to deny it but none of your comments make any sense to anyone but intel fanboys and trolls, which you sure are

Intel added AVX and AVX2 to Gracemont, kind of a huge change there. It would be funny to see Intel add hyperthreading and/or AVX512 to E-cores in the future, but somehow keep the die area small.

Inb4 AVX1024.
Very unlikely. AVX512 is power hungry for starters while it does increase efficiency if the work is AVX512 equipped, it also consumes a lot more die area (L1 changes required) but at the end of the day gracemont is still very heavily hamstrung (and also only as efficient as a skylake core WHILE BEING ON "7nm") so by the time its upgraded to be higher performance it won't be the same size anymore

That and they need a real L3 cluster still which they have to travel all the way to raptor/sunny cove L3
 
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