News AMD's first 2nm chip is out of the fab: EPYC 'Venice' fabbed on TSMC N2 node

Be interesting to see what kind of impacts Tariffs does to AMD's next-gen chips in regards to pricing.
They have been fairly consistent gen-on-gen thus far.
 
And they are stilll selling 4nm...
TSMC's 2 nm doesn't hit volume production until the end of this year.

Yeah, it's a little disappointing Zen 5 used a N4 node, but there are a few benefits:
  • TMSC has N4 production currently in its Arizona fabs and AMD is a customer. This is good for US sales of these chips and resilient supply if Taiwan gets cut off.
  • N4 is cheaper, giving AMD more flexibility with pricing.
  • Considering how competitive Zen 5 has been on N4, that bodes quite well for further reductions.

Honestly, the biggest complaint I have about Zen 5 isn't the CCDs, but rather the N6 IO die that they reused from Zen 4. Because of that, it has higher idle power and worse memory performance. I sort of wish they'd do a refresh with a newer IO die and then I might even be tempted to take the plunge.
 
The whole 2nm thing aside, I find it interesting that they're pulling out the 'Venice' code name again after 20 or so years.
All of the AMD Epyc CPUs have been named after cities in Italy.
  • Zen 1 = Naples
  • Zen 2 = Rome
  • Zen 3 = Milan
  • Zen 4 = Genoa; Zen 4C = Siena
  • Zen 5 = Turin

It was used for the 90nm Athlon 64 that, at the time, turned out to be vastly superior to the truly awful Intel Prescott Pentium 4 space-heaters.
You can see here that their naming convention was much looser, just picking an assortment of big cities from all over the place:

I think it's okay for them to reuse Venice, by now. Nobody is going to be confused by this.
 
With an expected launch date "somwhere in 2026" , these N2-based chips from AMD will probably hit the market around the same time as Intel's 18A chips (first half of 2026), or maybe even a few months later than Intel. So, that's nothing I would call "aggressive strategy", as both AMD and Intel are moving along toe to toe, as it seems.
 
How isn't being toe to toe aggressive?!
I mean sure, it's just normal pace and that's what amd would do even without intel being there but as far as sensationalism this is like very low.
Well, depends on what one associates with the term "aggressive". For me, aggressive means that a company is really pushing forward and taking the lead. So, if AMD were to bring their N2-based chips to market subsantially earlier than Intel their own 18A chips - now that would indeed be "agressive" in the best sense of this word.
 
As a result, some of the company's current-generation EPYC CPUs can now be produced in the U.S.

already instant price hike as TSMC stated at start chips made in states will cost more by default.
as both AMD and Intel are moving along toe to toe
except this for epyc atm which is server grade cpu's and intels got nothing close to competitive unless you specifically run something that favors intel (which is few and far between)
 
The whole 2nm thing aside, I find it interesting that they're pulling out the 'Venice' code name again after 20 or so years.

It was used for the 90nm Athlon 64 that, at the time, turned out to be vastly superior to the truly awful Intel Prescott Pentium 4 space-heaters.
I was thinking about this just yesterday. Intel absolutely had tunnel vision about clock speeds at the time and definitely pushed the P IV too far trying to run at 1 ghz. I ended up buying a P III Tualitan Chip at the time. To my knowledge that was actually one of the first chips with hyperthreading and even though it still reached a tad over 1 ghz it didn't have the heat issues.

Of course today we don't think twice about having liquid cooling or massive heat sinks that deal with 5X that much heat and never even think about it!
 
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I was thinking about this just yesterday. Intel absolutely had tunnel vision about clock speeds at the time and definitely pushed the P IV too far trying to run at 1 ghz. I ended up buying a P III Tualitan Chip at the time. To my knowledge that was actually one of the first chips with hyperthreading and even though it still reached a tad over 1 ghz it didn't have the heat issues.
Pentium 4 launched at 1.5 GHz, not 1 GHz. Pentium 3 didn't have hyperthreading.

I don't really blame intel for building Pentium 4 to clock high. They just had the bad luck of hitting the limits of Dennard Scaling at right about that time. If they'd tried the same strategy of deeper pipelines + higher clocks in the Pentium 2, it would've worked better that it did in Pentium 4.

BTW, I used to have a Prescott (3.2 GHz). I really should've gone with a Northwood, instead, but it was mostly okay. I had a really good heatsink on it, for the time, other than the fact that it tended to clog with dust. Probably my worst decision was to stick with AGP, which I did because PCIe seemed too new. That decision would later bite me, when I wanted to upgrade the graphics card (which I did 2-3 times, while owning that machine).

Of course today we don't think twice about having liquid cooling or massive heat sinks that deal with 5X that much heat and never even think about it!
Err... I mean my Pentium 4 had a TDP of like 103 W. I later replaced it with a Sandybridge i7-2600K (stock), which is slightly lower power. Now, I have an 65W i5 non-K. So, my CPUs have used less power, over time. I think I'd generally try to keep to around 105W, as an upper limit.
 
If non-C Epyc (Venice) chips are using "N2", this would seem to confirm the MLID leak that Zen 6 desktop chiplets will use N2X (which can be mixed and matched with N2P).

Skipping N3 nodes entirely is an aggressive move for consumer parts. I think N3 has had problems. N2 is the first GAAFET from TSMC, should be great power efficiency. Even better when we see A16 with backside power delivery.
 
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If AMD has one of the first N2 chips and only just received it, then it sounds like 18A will reach market much earlier, seeing as 18A chips came back like a year or two ago and in the last few months engineering samples have been demoed and shipped to OEMs. I would guess this first 2nm chip is a Zen 6c chiplet, which would compete against Clearwater Forest, which has been delayed and so Intel and AMD's high core count server processors might come to market about the same time.
 
TSMC's 2 nm doesn't hit volume production until the end of this year.

Yeah, it's a little disappointing Zen 5 used a N4 node, but there are a few benefits:
  • TMSC has N4 production currently in its Arizona fabs and AMD is a customer. This is good for US sales of these chips and resilient supply if Taiwan gets cut off.
  • N4 is cheaper, giving AMD more flexibility with pricing.
  • Considering how competitive Zen 5 has been on N4, that bodes quite well for further reductions.

Honestly, the biggest complaint I have about Zen 5 isn't the CCDs, but rather the N6 IO die that they reused from Zen 4. Because of that, it has higher idle power and worse memory performance. I sort of wish they'd do a refresh with a newer IO die and then I might even be tempted to take the plunge.
I'm sure the cost wasn't worth it for AMD at that time. That said, Zen 5c is on TSMC 3nm, so they actually did get their foot in the door.
 
I'm sure the cost wasn't worth it for AMD at that time. That said, Zen 5c is on TSMC 3nm, so they actually did get their foot in the door.
Zen 5C is the confounding factor in your explanation. I wonder if the N3 variant available to them just had properties that favored 5C more than higher-clocking Zen 5? If they couldn't get enough wafers to fab everything on N3, perhaps that's why the opted to use their allocation for 5C? Or, perhaps it was just too expensive to use on regular Zen 5.
 
'As a result, some of the company's current-generation EPYC CPUs can now be produced in the U.S. '

Maybe tariffs work after all!
 
'As a result, some of the company's current-generation EPYC CPUs can now be produced in the U.S. '

Maybe tariffs work after all!
Can't tell if sarcasm or not, but in case not this has literally nothing to do with tariffs. TSMC built a fab in AZ for N5 nodes which means new N5 capacity and since that's the most in demand TSMC node right now...
 
Probably they will produce 4 nm or higher very looooong.
I'm not sure how current the numbers are, but it looks like TSMC's most popular node right now is 20nm, producing more wafers than for any other size. TSMC still offers production on just about every major node up to 800nm; they'll be selling 4nm for many more decades.
Most electronic components are made without cutting edge process nodes and wouldn't gain any benefit from using a more advanced node. Chat-GPT says the smallest node likely used to make the components of your new TV's remote control these days is 90nm, with a good chance it's using an older/larger process than that. Older nodes are cheaper, have excellent yields, and are available all over the world to whoever needs to have chips made.
 
I'm not sure how current the numbers are, but it looks like TSMC's most popular node right now is 20nm, producing more wafers than for any other size. TSMC still offers production on just about every major node up to 800nm; they'll be selling 4nm for many more decades.
Fabs on the Chinese mainland are undercutting most others, on older nodes. This has the effect of compressing the time window when each new node must pay for itself, probably making them even more expensive than they'd historically have been. It's also one reason Global Foundries is looking at doing a new node, finally, with UMC:

Chat-GPT says the smallest node likely used to make the components of your new TV's remote control these days is 90nm,
Yeah, don't forget to ask it for a source, on that. At least Wikipedia provides sources (usually).