ASRock Z370 Exterme4 PCI slots for GPU

Aug 31, 2018
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Hello,
have a short question, since I am using single GPU is there difference which PCIE slot do I choose?

I choose middle one, since though about best airflow inside, but now I wonder if it's not better to put card on top slot.

Description of motherboard says:

- 3 x PCI Express 3.0 x16 Slots (PCIE2/PCIE4/PCIE6: single at x16 (PCIE2); dual at x8 (PCIE2) / x8 (PCIE4); triple at x8 (PCIE2) / x8 (PCIE4) / x4 (PCIE6))*

PCIE2 is a top one, I chose and mounted on PCIE4 at the moment.

Graphic atm 970 GTX, soon gonna be RTX 2080 if that matters.

On the other hand, found a moment ago this in manual:

PCIe slots:
PCIE1 (PCIe 3.0 x1 slot) is used for PCI Express x1 lane width cards.
PCIE2 (PCIe 3.0 x16 slot) is used for PCI Express x16 lane width graphics cards.
PCIE3 (PCIe 3.0 x1 slot) is used for PCI Express x1 lane width cards.
PCIE4 (PCIe 3.0 x16 slot) is used for PCI Express x8 lane width graphics cards.
PCIE5 (PCIe 3.0 x1 slot) is used for PCI Express x1 lane width cards.
PCIE6 (PCIe 3.0 x16 slot) is used for PCI Express x4 lane width graphics cards

So now I am not sure if PCIE4 is enough for full power GPU that use PCIE 16, cause of "is used for PCI Express x8" and having this "x16")
 
Solution
The x16 in "PCIE4 (PCIe 3.0 x16 slot)" means that the slot is x16-wide physically.
The x8 in "is used for PCI Express x8 lane width graphics cards" means that the x16 slot only runs in x8 electronically.

This is due to the fact that both the top PCIE2 and the middle PCIE4 slots are using PCIe3.0 lanes coming from the CPU (Intel 8th-gen), which can only provide a maximum of sixteen (16) lanes to BOTH these slots.

The way that motherboard is configured to share the said 16 CPU lanes is by having the top PCIE2 slot vary its maximum lanes either in x16 or x8 electronic speeds, i.e., at full x16 if the middle PCIE4 slot is not populated *or* at half x8 if...

Eximo

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There will be a slight performance improvement by using the x16 slot. The RTX2080 is a much larger GPU. I doubt anyone has done tests yet on PCIe limitations, but given that it has similar performance to a GTX1080Ti and that it can suffer something like 3% by using 8x vs 16x, I would move it to the top.
 
Aug 31, 2018
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But is PCIE4 a x16 or x8 slot, that I do not understand from manual:

PCIe slots:
PCIE1 (PCIe 3.0 x1 slot) is used for PCI Express x1 lane width cards.
PCIE2 (PCIe 3.0 x16 slot) is used for PCI Express x16 lane width graphics cards.
PCIE3 (PCIe 3.0 x1 slot) is used for PCI Express x1 lane width cards.
PCIE4 (PCIe 3.0 x16 slot) is used for PCI Express x8 lane width graphics cards.
PCIE5 (PCIe 3.0 x1 slot) is used for PCI Express x1 lane width cards.
PCIE6 (PCIe 3.0 x16 slot) is used for PCI Express x4 lane width graphics cards


It says PCIe 3.0 x16 slot but it is used for x8 lane GPU? So is it 16 or 8 after all?
And I wonder, since I can maintain better temperature (maybe! that I have to test) using the middle one, that might go with performance as well right.

The main reason why I started wondering about that is Verge video ;P and reaction for it from watch?v=LERCwH3F474 4:50
 
The x16 in "PCIE4 (PCIe 3.0 x16 slot)" means that the slot is x16-wide physically.
The x8 in "is used for PCI Express x8 lane width graphics cards" means that the x16 slot only runs in x8 electronically.

This is due to the fact that both the top PCIE2 and the middle PCIE4 slots are using PCIe3.0 lanes coming from the CPU (Intel 8th-gen), which can only provide a maximum of sixteen (16) lanes to BOTH these slots.

The way that motherboard is configured to share the said 16 CPU lanes is by having the top PCIE2 slot vary its maximum lanes either in x16 or x8 electronic speeds, i.e., at full x16 if the middle PCIE4 slot is not populated *or* at half x8 if the PCIE4 slot is populated, as such PCIE4 will use the other half x8. The middle PCIE4 slot, on the other hand, is fixed in its maximum lanes, i.e., at x8 electronic speeds - whether you have the top PCIE2 slot populated or not.

The other PCIe slots (PCIE1, 3, 5, and 6) use PCIe lanes from the Chipset (Z370).
 
Solution

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