Question Biostar Lists X570 Racing GT8 Motherboard, Chipset Specs for AMD Ryzen 3000 Series Revealed

[PaulAlcorn]

Biostar accidentally lists the X570 Racing GT8 motherboard, whipping the covers off the X570 chipset.

Biostar Lists X570 Racing GT8 Motherboard, Chipset Specs for AMD Ryzen 3000 Series Revealed : Read more

 

[drivinfast247]

Typo in first paragraph. The release date has the wrong year. Should be 2019.

Chipset fans making a comeback in '19!

 

[CountMike]

Somehow I can't imagine Biostar as a leader but that MB looks awesome with that VRM.

 

[feelinfroggy777]

It needs a fan on the chipset, not a good start for PCIe 4.0, especially if the extra bandwidth cant really be used.

 

[Gillerer]

The news piece says

The motherboard also comes equipped with three M.2 slots for storage devices, with one marked as a PCIe 4.0 x4 connection capable of 32 Gb/s of throughput, while two SATA M.2 slots run at the same speed. Biostar's listing indicates all three of the M.2 sockets hang off the platform controller hub (PCH).

However, the specs listing clearly indicates that:

1. the first M.2 comes directly from the CPU, and the other two from the PCH; and
2. all M.2 slots are capable of either PCIe 4 x4 or SATA.

*

Would be interesting to know, whether using a M.2 SATA drive will disable any of the dedicated SATA connections (as is customary on Intel platforms).

 

[AMv8(1day)]

The news piece says



However, the specs listing clearly indicates that:

1. the first M.2 comes directly from the CPU, and the other two from the PCH; and
2. all M.2 slots are capable of either PCIe 4 x4 or SATA.

*

Would be interesting to know, whether using a M.2 SATA drive will disable any of the dedicated SATA connections (as is customary on Intel platforms).

Agree with the above apparent discrepancies, as well as the quoted "PCIe 4.0 x4 32 Gb/s speed. That's PCIe 3.0 x4 speed. 4.0 x4 is double that (64Gb/s or 8GB/s).

 

[supremelaw]

That's PCIe 3.0 x4 speed. 4.0 x4 is double that (64Gb/s or 8GB/s).

I noticed that too: PCIe 4.0 x4 connection capable of 32 Gb/s

The PCIe 4.0 clock rate is 16 Gb/s, exactly double the PCIe 3.0 8G clock rate.

The exact throughput of a single PCIe 4.0 lane is:

16 GHz / 8.125 bits per byte x 4 lanes = 7,876.92 MB/second

Compare that to the PCIe 3.0 throughput of a single lane:

8 GHz / 8.125 bits per byte x 4 lanes = 3,938.46 MB/second (exactly half)

the PCIe 3.0 "jumbo frame" stores 16 bytes + one start bit and one stop bit,
i.e. 130 bits / 16 bytes = 8.125 bits per byte

 

[alextheblue]

Those suggested memory overclocks are promising. Seems like Zen 2's memory controller will be capable of hitting much higher speeds, if the previously-conservative numbers by the manufacturer have been boosted that much. With that being said, we'll have to see how well Zen 2 and the new revision of IF scale. Current Zen starts getting diminishing returns around 3000. If it scales well to at least 3600 I would be happy, since 3600 kits are starting to get pretty affordable now.

It needs a fan on the chipset, not a good start for PCIe 4.0, especially if the extra bandwidth cant really be used.

Storage devices will be PCIe 4.0 compatible soon. In the not so distant future, high end M.2 devices won't have a problem taking advantage of the extra bandwidth, seeing as how M.2 is limited to 4 lanes.

Also, it's future proofing to some extent. If you buy a 3.0 platform today, you're stuck at 3.0 speeds. If you buy a 4.0 platform, both 4.0 and upcoming 5.0 devices will operate at 4.0 speeds. There's no good reason for AMD to skip PCIe 4.0 right now, it benefits their server business almost immediately, and will aid consumer platforms to some degree in the near future.

 

[ElectrO_90]

I noticed that too: PCIe 4.0 x4 connection capable of 32 Gb/s

The PCIe 4.0 clock rate is 16 Gb/s, exactly double the PCIe 3.0 8G clock rate.

The exact throughput of a single PCIe 4.0 lane is:

16 GHz / 8.125 bits per byte x 4 lanes = 7,876.92 MB/second

Compare that to the PCIe 3.0 throughput of a single lane:

8 GHz / 8.125 bits per byte x 4 lanes = 3,938.46 MB/second (exactly half)

the PCIe 3.0 "jumbo frame" stores 16 bytes + one start bit and one stop bit,
i.e. 130 bits / 16 bytes = 8.125 bits per byte

"the bandwidth of the PCIe 4.0 technology (Up to 64 Gbytes/s of total bandwidth for a PCIe 4.0 x16). "
https://www.plda.com/blog/category/technical-article/market-ready-conquer-pcie-40-challenges
So it is correct as its 16 per lane and 16x 4 = 64 TOTAL = 32 up and 32 down - so 32 can be read or written - but it all depends on how you look at it.

you can say it has a transfer of 32 or 64 - depends if you want to name max one way or max both ways.

 

[TJ Hooker]

"the bandwidth of the PCIe 4.0 technology (Up to 64 Gbytes/s of total bandwidth for a PCIe 4.0 x16). "
https://www.plda.com/blog/category/technical-article/market-ready-conquer-pcie-40-challenges
So it is correct as its 16 per lane and 16x 4 = 64 TOTAL = 32 up and 32 down - so 32 can be read or written - but it all depends on how you look at it.

you can say it has a transfer of 32 or 64 - depends if you want to name max one way or max both ways.

PCIe speeds are stated as max speed in each direction, due to it being a full duplex link. PCIe 4.0 x4 is capable of 64 Gbps in each direction. Your own link says as much:

"In term of performance, with PCIe 4.0, throughput per lane is 16 GT/s. The link is full duplex, which means the data can be sent and received simultaneously à Total Bandwidth: 32GT/s."

 

[supremelaw]

PCIe 4.0 x4 is capable of 64 Gbps in each direction.

Correct! The raw data stream of O's and 1's (binary digits)
transmits 16 Billion such binary digits per second
over a single serial channel.

Just multiply by the number of serial channels
to calculate maximum feasible throughput.

Where some people stumble is the conversion
to "bytes per second". This is easily done by
understanding the "jumbo frame" layout aka 128b/130b.

The latter refers to 16 x 8-bit bytes + 1 start bit + 1 stop bit
for a total of 130 binary digits per jumbo frame:

16 x 8 + 1 + 1 = 128 + 2 = 130 bits

Thus, the exact divisor is 130 bits / 16 bytes = 8.125 bits per useful byte.

And, 16 Gbps / 8.125 = 1,969.23 Megabytes of useful data per x1 PCIe 4.0 lane.

(The latest USB standard uses a slightly different jumbo frame: 128b/132b .)

Hope this helps.

 

[Gillerer]

Also, it has three PCIe x1 slots, and not one.