P4Man

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<A HREF="http://www.tomshardware.com/hardnews/20050929_140220.html" target="_new">http://www.tomshardware.com/hardnews/20050929_140220.html</A>

No one was expecting a lot from Cedar Mill, but this looks appaling. A reduction from 95W to 86W is next to nothing for a process shrink (90->65nm); worse, with diesize roughly cut in half, thermal density will be about twice what prescott was (!!). And there we where thinking prescott was hot... ouch.

No surprises then, clockspeeds keep going *down* with the above link mentioning 3.6 max clock. I sure hope merom/conroe will be on time, because the next 12 months dont look good for intel

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mpasternak

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I think you're missing the point of cedar mill.

it's STILL a p4. still the same design and architecture. just smaller die size. it would be foolish to expect any miracles from it since it will still suffer from the same problems the Prescott has. POOR DESIGN. which has nothing to do with it being 90m or 65m
 

P4Man

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>it's STILL a p4. still the same design and architecture. just
> smaller die size.

Oh, thanks for clueing me in, I guess I didnt know that :$
Still its quite dissapointing a 65nm shrink doesnt seem to bring any benefit whatsoever (except for intel), quite on contrary: it will be even hotter (much higher W/mm²) and clocking lower. And if that is bad for single core, it bodes horror for dual core. 2x86W is not exactly feasable, and thermal hotspots will be an even greater issue than for smithfield. I wonder if intel will be able to produce DC parts above 3 GHz, or if instead they will only be competing with AMDs lowest end until Merom arrives.

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mpasternak

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well, the move isnt to benefit the P4 generation so much as the "p5" generation that they WILL be going to. this gets their fab's up to the new size BEFORE the introduction of the new architecture.
 

mpasternak

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well, the move isnt to benefit the P4 generation so much as the "p5" generation that they WILL be going to. this gets their fab's up to the new size BEFORE the introduction of the new architecture.

They did this already once moving from the 130 to the 90 during the early P4 days. the idea was to move to 90 and the preshoots
 

slvr_phoenix

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Well, what can one really say except, "Meh. Same new Intel."

Really, the Northwood era of <font color=blue>Intel</font color=blue>igence is over.<pre><font color=orange> ∩_∩
Ω Ω
(<font color=green>=¥=</font color=green>)</font color=orange> - It's all making me feel rather <A HREF="http://www.amd.com" target="_new"><font color=green>green</font color=green></A>.<font color=orange>
_Ū˘Ū_</font color=orange></pre><p> :evil: یί∫υєг ρђœŋίχ :evil:
<i>All your <b><font color=red>Devil</font color=red></b> are belong to us.</i> - Cedrik
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P4Man

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>They did this already once moving from the 130 to the 90
>during the early P4 days. the idea was to move to 90 and the
>preshoots

No, they did NOT. Prescott was a new design, far more complex than Northwood, and its heat problems where related to it, not to the 90nm process. prescott was anything but a straight shink, and most ppl wished for a 90nm Northwood instead. Cedar Mill is pretty much a straight shrink of prescott, so one would have expected better thermals and clockspeeds, but no such luck apparently


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slvr_phoenix

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<pre><font color=orange> ∩_∩
Ω Ω
(=¥=)</font color=orange> - Cedrik says that 10% is a <i>little</i> better.<font color=orange>
_Ū˘Ū_</font color=orange></pre><p>

:evil: یί∫υєг ρђœŋίχ :evil:
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P4Man

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We all know how bad your math skills are :)
10% lower TDP for ~half the diesize is massively higher thermal density

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G

Guest

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As for single it will remain at the same 3.8ghz
The current Pentium 4 roadmap includes five basic Cedar Mill-based processor, the 631, 641, 651, 661 and 671 (3.0 to 3.8 GHz).
My question is how about the fact that the die will be "separated", would'nt that help a bit for thermal density? or will it only help them improve yields?

Asus P4P800DX, P4C 2.6ghz@3.25ghz, 2X512 OCZ PC4000 3-4-4-8, MSI 6800Ultra stock, 2X30gig Raid0
 

P4Man

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>As for single it will remain at the same 3.8ghz

Hmm, indeed. apparently the 3.8 GHz one will have an even higher TDP though.. ouch.

>My question is how about the fact that the die will be
>"separated", would'nt that help a bit for thermal density?

You mean for the dual core models ? No it wouldnt really make a difference both cores will still be as small and hot and share a single heatspreader/heatsink. I dont see how it would make a difference.

>or will it only help them improve yields?

It could help yields, but thats not even a given, and I suspect also not the main reason for doing it that way. For instance packaging seems a lot more difficult with 2 seperate cores, and any problems occuring at that stage could render the entire chip useless.

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Crashman

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Northwood was a half-fast core. Everything else P4 was trash.

<font color=blue>Only a place as big as the internet could be home to a hero as big as Crashman!</font color=blue>
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Viditor

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It's apparent that THG still doesn't understand what TDP is...From the article:

"...allows for a TDP (Thermal Design Power or a maximum heat dissipation)..."

Intel's TDP is NOT maximum heat dissipation, and it says so quite plainly in Intel's definition of TDP! It's a guideline for TYPICAL heat dissapation under full load.
It says quite plainly that this is not max heat...
AMD's TDP is different in that it IS max heat, and says so quite plainly in the guidelines...

Cheers,
Charles
 

Crashman

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Former Staff
Yes, but there's another problem: AMD's TDP doesn't even have relavence to actual product, but instead is the maximum allowed for the design. It's a worst-case scenario that never, ever happens. ie, you'd blow a Venice before you'd get it to produce the maximum heat AMD says it might theoretically produce.

<font color=blue>Only a place as big as the internet could be home to a hero as big as Crashman!</font color=blue>
<font color=red>Only a place as big as the internet could be home to an ego as large as Crashman's!</font color=red>
 

P4Man

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THG has a "great" article up on Cedar Mill
<A HREF="http://www.tomshardware.com/cpu/20051007/index.html" target="_new">http://www.tomshardware.com/cpu/20051007/index.html</A>

its called "Cedar Mill Cools Down The Pentium 4 Heat", yet there are no temperature measurements, and power measurements show its only marginally below Prescott while being almost twice as small.. guess what, that most likely means its considerably hotter, not cooler.

Then they have a subtitle called "It Is Not Just A Die Shrink!", while really, it is. Just some tweaks to the process (no kidding, its a new process!), and "sleep transistors".. no new or changed functional units though, no performance or functional improvements, nada. IOW, just a basic shrink.

then they claim:"As you will see in the test result section, Cedar Mill actually manages to reduce the system power consumption under load by as much as 20% when compared to Prescott 2 MB (see test setup table for system details). This difference is large enough to bring Intel back into the performance per watt game when competing with AMD"

really ? Last time I checked, Venice and San Diego consumed about 1/3 to 1/4 of what Prescott needs.. so now a 20% reduction (and a 50+% increase in thermal density) would make it competitive ? LOL

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IIB

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All good points.
3-4 years or so ago... CPU articles we're good.
sence then... down the hill.


This post is best viewed with common sense enabled
 
G

Guest

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Yeah all good points,its rather sad.
Also funny to note THG is the only site having this kind of info and access too somedata, looks like it was the only people intel trusted to make an "appropriate review"!!!

I see cedar mill as a way to improve te 65nm process for soon to come Yonah and upcoming merom/conroe...

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endyen

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What makes this even more alarming is that the chip they used was a hand picked contoled environment unit. Is it even remotely possible that Intel will get the same results, in mass production?
 

ltcommander_data

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It's clear from the above comments that people have a very small understanding of how a processor works. I've reviewed the article and I find nothing wrong with their conclusions.

Firstly, you have to understand the purpose of strained silicon. Strained silicon is effectively stretched silicon that increases space between atoms. The increased space allows electrons to flow with less resistance. The operative word is "less resistance". In the new Cedar Mill 65 nm process the strained silicon is improve by 15% which means less resistance and lower temperature.

Secondly, Intel has wisely kept the isolating layer between gates and electrodes the same as the 90 nm process at 1.2nm. This means that components still maintain the same distance between each other. Clearly issues of thermal density are alleviated as the separation between components, which as mentioned above are cooler due to strained silicon, is maintained. As well, the heat spreader remains the same size while the die has shrunk. Therefore the heat is comparativly spread over a larger area.

It is quite clear, that Cedar Mill does provide definate improvements in terms of heat production, distribution, and power usage. Whether that puts them "back in the game" is your own opinion. I personally feel that its a great start and that Intel should continue to increase clock speeds for Cedar Mill. Since the current motherboards support higher TDP, Intel might as well take advantage of it and scale speeds higher. People may complain about performance per watt, but it has always been known that the Prescott architecture which Cedar Mill is based on scales very well. In otherwords, the 200 MHz difference between the 660 and the 670 provides a larger performance increase than the 200 MHz between the 630 and the 640. Therefore increasing Cedar Mill to 4 GHz or 4.2 GHz will definitely yield increased performance per watt since the performance increase will be proportionately larger. Afterall, this is the last chance for Intel to break the 4 GHz barrier. With the focus shifting to shorter pipelines, 4 GHz will probably never be reached again.

In response to Endyen's comments on the ability of mass production chips to replicate the demonstrated reduced heat, once again you must have an understanding of what you are trying to insult. Intel develops the process of producing a chip at one fabrication plant. Once that process is finallized, the process is replicated exactly at all Intel's other fabrication plants. They use the same pressure, the same air, even the same water. Therefore, all chips will of the same performance. Nothing is "alarming" about that.
 

endyen

Splendid
Once that process is finallized
Unfortunatly, that is not now the case. All we are seeing with this "example", is an optimal outcome. The pick of the litter so to speak. For us to get any joy, this sample would have to be considerably better at limiting leakage current.
That is not the main concern. The idea that a core is 15% cooler, but 28% smaller is very scary. Many of Intel's present chips will throttle at normal usage. That situation is only likely to worsen.
Had Intel incorporated thier FD SOI in cedar, we would all be cheering that Intel was back in the game. To anyone with real insite, this latest core is another step down a bad road. Intel has failed again.
 

Era

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Afterall, this is the last chance for Intel to break the 4 GHz barrier. With the focus shifting to shorter pipelines, 4 GHz will probably never be reached again.
So what? Like Wusy implied, it's all about efficiency/Watt/$ (excluding Intel marketing dep).
 

P4Man

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> In the new Cedar Mill 65 nm process the strained silicon is
>improve by 15% which means less resistance and lower
>temperature.

The results arent really impressive, are they ? I cant remember a dieshrink ever only bringing a 20% power improvement per clock, and no increased clockspeeds at all. AFAIR even Tbred-A gained more from its shrink than Cedar Mill.

>Secondly, Intel has wisely kept the isolating layer between
> gates and electrodes the same as the 90 nm process at
>1.2nm. This means that components still maintain the same
>distance between each other. Clearly issues of thermal
>density are alleviated as the separation between
>components,

Rubbish. Thermal density as expressed in W/mm² has gone considerably up, not down. Yes, a heatspreader helps, but it wont stop the die from reaching higher temperatures than Prescott. Assume you'd have the same power consumption and same heatspreader area, but half the core size; what happens is that the heatsink and heatspreader will get equally hot, but the die temperature of the smaller core will be much higher. If you cant grasp that, consider how hot a 85W needle tip would be, or how hot it would have to be to heat up the heatsink as much a P4 does. Unless intel is now defnining TDPs differently as they did for Prescott, I guarantee you Cedar Mill will run hotter, and not just a tiny bit.

>personally feel that its a great start and that Intel
>should continue to increase clock speeds for Cedar Mill.
>Since the current motherboards support higher TDP, Intel
>might as well take advantage of it and scale speeds higher.

Its quite obvious they cant. 3.8 GHz Cedar Mill, even if it happens, seems to be a higher TDP part, most likely a review/PR sample that will hardly ship. And its not like 3.8 GHz prescotts where abundant. As it stands, 4.2 GHz is only a pipedream.

>Therefore increasing Cedar Mill to 4 GHz or 4.2 GHz will
>definitely yield increased performance per watt s

Thats the silliest thing I read in a while. Increasing clock speed increases power consumption proportionally if you can achieve it at the same Vcore. IRL, you usually need to increase Vcore to achieve higher clocks, which further increases power consumption, but this time, quadratically. Performance scales linear at best, but in reality, its almost always sublinear. So obviously increasing the clock *lowers* performance/watt. It always does.

>Intel develops the process of producing a chip at one
>fabrication plant. Once that process is finallized, the
>process is replicated exactly at all Intel's other
>fabrication plants. They use the same pressure, the same
>air, even the same water. Therefore, all chips will of the
>same performance. Nothing is "alarming" about that.

Non Sequitur. Endyens concern was that this sample was a cherry picked one. With any CMOS production you have good and bad samples. I dont share his concern as they didnt even measure temperatures so the only relevant information is the numbers (performance, TDP, die size which will apply for the entire line) , and further more this is a preproduction sample, so if anything, future products will likely be better, but your comments have nothing to do with this at all.

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ltcommander_data

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I agree that the power improvement of Cedar Mill isn't spectacular. I think that the 90nm process used for the AMD64 yielded around a 25% power reduction so 20% in Cedar Mill isn't bad either.

"Assume you'd have the same power consumption and same heatspreader area, but half the core size; what happens is that the heatsink and heatspreader will get equally hot, but the die temperature of the smaller core will be much higher."

I think the thermal issues kind of depend on the point of view. Yes thermal density does increase. However, the power consumption does not stay the same. If it were to then thermal density would double. In this case, from this sample power consumption decreases about 20%. I'm not sure how much the die size decreases but at most it will be 50%. So thermal density then increases by 60% rather than 100%.

In the end, the thermal density increase will likely be considerably less than that. The die size will likely be shrunk by less than 50% since the space between transistors has not changed, only the transistors themselves have shrunk. Therefore the die size will likely be closer to a 40% decrease yielding an increased thermal density of 33% rather than 60%.

In addition, these power readings are only based on an early qualification sample obtained through a third part. These results do not reflect the results of the final product nor even the parts that Intel is currently testing. As the 65nm process matures, strained silicon isn't the only power reduction feature implemented. Reductions in gate capacitance reduces power consumption. As well, use of low-k dielectric material results in increased signal strength. This means that less power needs to be used to maintain the current signal strength. All these features further reduce power consumption bringing down thermal density in the final product.

From a microscopic (nanoscopic) point of view, each transistor produces less heat, which still has the same distance (1.2nm) to dissipate before it reaches a neighbouring transistor. This would indicate better thermal conditions. However, from a macroscopic point of view, the overall thermal density increases. Whether this actually causes throttling issues depends on the strength of Intel's design.

I still think that the heat spreader plays a critical roll in the thermal issues of Cedar Mill. What has been mentioned on thermal density so far has been confined to a thermal density analysis of the die. However, the die has excellent heat conductivity with the heat spreader. Looking from the global processor perspective, the thermal density of the processor itself greatly decreases since the 20%+ reduced heat generation is dissipated over the same area of heat spreader.

Of course, all this talk is only valid when the processor is working at 100% load. The rest of the time thermal density and heat generation in general won't be a big concern. With the introduction of sleeping transistors areas of die not in use will have their power cut. In other words, if the processor is only working at 50% load, large portions of the processor will not receive power and not produce heat.

Overall, I don't believe that the picture of Cedar Mill should be painted as bleak as its made out to be.
 

P4Man

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>I think that the 90nm process used for the AMD64 yielded
>around a 25% power reduction so 20% in Cedar Mill isn't bad
> either.

No, A64 improved performance/W by about 40% going from 130 to 90nm:

<A HREF="http://www.xbitlabs.com/articles/cpu/display/athlon64-90nm_5.html" target="_new">http://www.xbitlabs.com/articles/cpu/display/athlon64-90nm_5.html</A>

As usual, AMDs TDP values dont really reflect that, but another way of showing this is by looking at the fact that A64 went from 2.4 GHz single core to 2.4 GHz dual core with about the same TDP.

Also, looking at the article, note how this reduction in powerconsumption is almost completely offset by the smaller diesize, resulting in die temperatures which are almost identical between Winchester and Sandiego in spite of a very healthy drop in powerconsumption (and a heatspreader). So if you think a 10% (95->86W) reduction is not going to be offset by the smaller die, you are in for a nasty surprise. Worse yet, AFAICT the 3.8 GHz Cedar Mill might not even see a reduction in TDP... Unless intel suddenly started using AMDs definition of TDP, I guarantee you this chip will make an 840EE cool as an icecube.

>In addition, these power readings are only based on an
>early qualification sample obtained through a third part.
>These results do not reflect the results of the final
>product nor even the parts that Intel is currently testing.

Im not basing myself on those, since there are no details at all what was measured or how, so Im basing myself on the TDP values and the clockspeeds of Cedar Mill. The fact 3.8 GHz is not being listed, or at least not as a 85W part should speak volumes about the shape it is in.


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