I was just thinking about how DDR memory doesn't seem to give much (if any) performance gain over SDR. It still baffled me because it supposedly has twice the bandwidth, so should have much more of an impact on system performance than that.
Then I thought about it.
DDR works twice as fast because it send and recieves data on the rising and the falling of the clock cycle.
But is the rest of the system actually sending and recieving on the rise and fall of the clock cycle? I don't think that it is.
The CPUs are still externally using a 133MHz FSB. Athlons only use the double-pumping internally, to my knowledge. So they're still only doing I/O once per cycle of the FSB.
And possibly even the north bridge is designed to only do I/O once per cycle.
So even though the memory could theoretically work twice as fast, the CPU and/or the northbridge are completely ignoring the ability to transfer data twice per clock cycle.
So, theoreticaly, if you had a CPU and motherboard running at a 266MHz FSB, then PC2100 would be synced perfectly with the rest of the system.
However, because nothing uses an FSB that fast, the second I/O that the memory is capable of is completely ignored. So it's the CPU that is failing the concept of DDR SDRAM, not the memory.
Does this make any sense, or am I smoking some funky stuff here?
If the opposite of pro is con, what is the opposite of productivity? Ground first.
Then I thought about it.
DDR works twice as fast because it send and recieves data on the rising and the falling of the clock cycle.
But is the rest of the system actually sending and recieving on the rise and fall of the clock cycle? I don't think that it is.
The CPUs are still externally using a 133MHz FSB. Athlons only use the double-pumping internally, to my knowledge. So they're still only doing I/O once per cycle of the FSB.
And possibly even the north bridge is designed to only do I/O once per cycle.
So even though the memory could theoretically work twice as fast, the CPU and/or the northbridge are completely ignoring the ability to transfer data twice per clock cycle.
So, theoreticaly, if you had a CPU and motherboard running at a 266MHz FSB, then PC2100 would be synced perfectly with the rest of the system.
However, because nothing uses an FSB that fast, the second I/O that the memory is capable of is completely ignored. So it's the CPU that is failing the concept of DDR SDRAM, not the memory.
Does this make any sense, or am I smoking some funky stuff here?
If the opposite of pro is con, what is the opposite of productivity? Ground first.