Do you think Phenom performance can be improved, by eliminating L3?

edwuave

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...and add more L2 caches instead. From what I see, the memory bandwidth benchmark of Phenoms is actually slower than K8. This is largely due to the high latency of L3 caches. I dont think any applications (games, encoding, HD play back....) benefit much from L3 cache other than enterprise applications. Seeing all those benchmarks where even a Q6600 pawn any of the Phenoms hands down, is so disappointing. Clock for clock, Phenom is ~13.5% slower, and i believe the slow memory bandwidth is the main culprit here. By removing the big L3 cache (which eats up die size) and add more L2 cache, i believe AMD will be still on game, but what we have here is a very disappointing processor which not only perform slow, but also also pricier and generate more TDP.
 

spoonboy

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The athlon X2 in 90nm form has a larger L2 cache than the phenom (1mb vs. 512kb), and clock for clock a phenom will mostly beat an athlon in single threaded tasks (that dont make use of the phenoms 2 extra cores).

An L3 cache adds latency, but if it was a hindrance to the cpu they would have done away with it before starting production. Reducing the L3 cache latency would probably be more helpful, and easier than adding more L2 or L3 cache. A large unified cache for all cores to use is far better than seperate large caches for each core.... just look at core 2!

Apparently the phenoms L3 cache is quite slow and could be speeded up quite alot, which is holding it back, and - correct me if im wrong - the cache runs at a certain speed independent of the cpu, so it doesnt scale with clock increases. Something to do with hyper transport I think.
 

zenmaster

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I'm not sure, but I think the L3 scales to the CPU but not at 1:1.
I do know that the faster the Phenom runs, the more problems the cache causes and is one of the primary reasons AMD is having a tough time releasing faster speeds.
 

spoonboy

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Yeah I just remember one of the reviews I read saying the clock speed went up (when they were overclocking) but the L3 speed stayed the same. Then again it wasnt clear if that was because the motherboard was an am2 not am2+.

The faster phenom that amd had to pull at the last minute has a higher hypertransport speed than the other 'safe' models(1800mhz vs. 2000mhz), so maybe some kind of coordination error going on between the 4 cores, or the higher speeds exposing a flaw in the tlb design. This is the first stepping and thinks will get alot smoother all round. As long as amd keep the price down their on to a winner that has, in effect, made the whole 2 core desktop cpu lineup obsolete. Plus amd's own I might add.
 

BaronMatrix

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The L3 runs at the speed of the North Bridge. There is currently an errata that maybe affecting the latency of L3.
 

yomamafor1

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Since AMD implemented split power plain, L3 and northbridge runs at a different frequency than rest of the cores. While all the cores can be adjusted differently, since L3 is shared, so it must run at a fixed speed.

If I'm not mistaken, currently L3 and northbridge run at 2.0Ghz.
 

4745454b

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From the articles I've read, the L3 runs at 2.0GHz, and can't be currently changed. It does run independent from the cores, but the speed is currently fixed.

I don't think removing the L3 and making the L2 bigger would help much. Yes the cores are a lot wider, but they are still mostly an K8 core. Due to the IMC, they don't need lots of cache. What they need is something other then SOI so that they can get their clock speeds up.
 

4745454b

Titan
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You might have been mistaken, but I'm thinking that means AMD might be lying. What was wrong exactly with the 2.4GHz+ chips? Did they say that it was an issue with cache misses in the L3? If the cache is limited to 2GHz no matter what speed the cores are running at, what then is the problem??? Either AMD is lying, or I'm not remembering the correct problem with the 2.4GHz chips.
 

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