News DRAM Alternative Developed: 4X Higher Density at Higher Speed and Lower Power

mikewinddale

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Dec 22, 2016
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Of course, this comes just as the industry has adopted DDR5!

Maybe this will become the DDR6, so to speak?

Or I wonder if a DDR5 module could use these DFM chips plus some sort of controller chip, similar to registered DRAM, but appearing to the system as if it were an ordinary unregistered module with regular DDR5 DRAM chips? That would add complexity, but if DFM is so much more dense than DRAM, perhaps it would be worth it? For the price of one controller chip, you use 1/4 the memory chips.

Or perhaps that might at least be worth it for systems that already use registered memory? 2 TB of DFM that use a special registered controller chip might cost a fraction of the price of regular registered DRAM, even if the controller chip is more complex because it has to appear to the system as if it were DDR5 DRAM.
 

aldaia

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Oct 22, 2010
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"Each column of cells consists of two '+' and '−' bitlines that are connected to their own sense amplifiers that are used to read/write data from/to the cells."

That is incorrect. Static RAM do have two + - bitlines. Dynamic RAM however has a single bitline per column.
 

InvalidError

Titan
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One more memory design claiming to be capacitor-less yet uses gate charge to store data. Smaller than conventional DRAM cell capacitors but still very much a capacitor.

Of course, this comes just as the industry has adopted DDR5!
DDR5 is just an interface. The internal implementation can be whatever the manufacturer wants as long as it maintains compatibility with DDR5 interface requirements, nothing in the DDR5 spec says that memory cells must be capacitor-based. You could make DDR5 SRAM if you wanted to, just set irrelevant latencies to as low as the DDR5 spec will allow.
 
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1843320948

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Mar 2, 2017
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Umm, it is using a surround gate so electron tunneling will yield the same durability as flash (electron tunneling).
 

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