E3, E4 or E6 stepping

[Oracle]

It's been a while since I was here, but now I'm somewhat confused about AMD's latest CPU steppings.
I was under the impression that the E3 stepping was for the Venice core, E4 for San Diego and E6 for Toledo (X2), with the SSE3 instruction set included in the E4 stepping and forward. Now, I've seen enough contradictory stuff around the Web to confuse me. I can no longer figure out where SSE3 stands. I know SSE3 is not that big of an issue and that L2 and dual core are more important issues, but still I would like to clear things out for myself.
So, what really are the E3, E4 and E6 steppings and what differences do they bear?
Thanks guys!

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<font color=blue>"Old" DFI NF2 Ultra Infinity
"Old" XP3200+
HyperX PC3500 1Gb
"Old" Sapphire 9600XT 256Mb</font color=blue>

 

[Topweasel]

They are mostly the same Stepping in terms of design improvements but adjusted for each individule core. E3 is The first Stepping that supports SSE3. E0 was Winchester was a dry run and a way to lower costs on the Cheap (resale) chips i wouldn't be surprised if SSE3 was already apart of of them but waited till they had all cores on .09, so they weren't giving the cheap cpus and 'advantage", before enableing it.

 

[endyen]

What happened to E5? Would that be X2 with 512 cache?
E3 had SS.

 

[Oracle]

There is no E5 stepping, at least not for desktop or server processors. Maybe it's in Turion, but someone else would have to confirm that.
Maybe AMD thought it would bring good luck if it went directly from E4 to E6.

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<font color=blue>Why am I under the impression that I am not under any?</font color=blue>