News Engineer creates CPU from scratch in two weeks — begins work on GPUs

[Admin]

An engineer has shared his experience of designing a CPU from scratch, over two weeks, 'with no prior experience.' He has just started the arduous task of making a GPU from scratch.

Engineer creates CPU from scratch in two weeks — begins work on GPUs : Read more

 

[artk2219]

I wonder what the specs are and if he's actually gotten any code to run on it.

 

[Blastomonas]

I don't believe that this is true. I suspect that some exaggeration is going on here..

 

[why_wolf]

I'm imagining this is creating a "functional" but not "useful" CPU. So something that can maybe run "Hello, World" and that's it.

 

[Blastomonas]

I'm imagining this is creating a "functional" but not "useful" CPU. So something that can maybe run "Hello, World" and that's it.

This would make more sense.

I struggle to accept that an engineer had no relatable experience in chip design before deciding to make one. The idea that one Monday morning this guy decided to build a cpu from scratch with no knowledge and then 14 days later its ready to go seems unlikely to me.

Genius level inteligence or down playing their own knowledge and experience? I believe that people go to university for years to learn the skills and knowledge to do this.

 

[Conor Stewart]

Learning things quickly isn't always a good thing.

Creating my first full circuit in Verilog – “my first experience with programming hardware using software.”

This is an example, by using verilog you are not programming hardware using software, verilog is not a software programming language, it is a hardware description language. Yes you could argue they mean using software to synthesize and implement the hardware but I doubt this is what they mean. Too many people, especially software engineers which they claim to be, treat verilog and VHDL as just another programming language.

Something definitely seems off too, it would be hard but possible to go from no knowledge to a basic CPU in two weeks, however it would not be any more than a demonstration, there is pretty much no way they went from no knowledge to an actually useful CPU in just two weeks unless they copied others work. Based on the fact they mention using some kind of AI and open source projects for learning this might be the case.

It could also just be that this is an awful design but it does technically work, maybe something like Ben Eater's breadboard computer that I believe only had 16 bytes of memory and was 8 bit. It does work well enough to run a simple program like incrementing a counter or performing basic calculations but it is not useful in any way other than just for learning.

If I remember bitluni's video on his tiny tapeout design then the cells they were allowed were very small and he pretty much implemented a ROM and he couldn't manage to fit much in, so it ended up being a very small ROM and even then used up 4 of the available cells (I think bitluni was given a chance just because they had space to fill so that may be why he was allowed 4 cells, also he wasn't given much notice or time to finish it which also probably also means it was just to fill space). So making a CPU within tiny tapeout, it either has to have no on board memory or it is a very very basic CPU with very little memory.

I think there is probably a reason that people haven't implemented usable CPUs (like RISC-V) on tiny tapeout before.

Edit: looking at tiny tapeout 6, someone may be trying to make a RISC-V EC processor on it but I'm not sure how functional it will be.

 

[rfdevil]

Learning things quickly isn't always a good thing.


This is an example, by using verilog you are not programming hardware using software, verilog is not a software programming language, it is a hardware description language. Yes you could argue they mean using software to synthesize and implement the hardware but I doubt this is what they mean. Too many people, especially software engineers which they claim to be, treat verilog and VHDL as just another programming language.

Something definitely seems off too, it would be hard but possible to go from no knowledge to a basic CPU in two weeks, however it would not be any more than a demonstration, there is pretty much no way they went from no knowledge to an actually useful CPU in just two weeks unless they copied others work. Based on the fact they mention using some kind of AI and open source projects for learning this might be the case.

It could also just be that this is an awful design but it does technically work, maybe something like Ben Eater's breadboard computer that I believe only had 16 bytes of memory and was 8 bit. It does work well enough to run a simple program like incrementing a counter or performing basic calculations but it is not useful in any way other than just for learning.

If I remember bitluni's video on his tiny tapeout design then the cells they were allowed were very small and he pretty much implemented a ROM and he couldn't manage to fit much in, so it ended up being a very small ROM and even then used up 4 of the available cells (I think bitluni was given a chance just because they had space to fill so that may be why he was allowed 4 cells, also he wasn't given much notice or time to finish it which also probably also means it was just to fill space). So making a CPU within tiny tapeout, it either has to have no on board memory or it is a very very basic CPU with very little memory.

I think there is probably a reason that people haven't implemented usable CPUs (like RISC-V) on tiny tapeout before.

Edit: looking at tiny tapeout 6, someone may be trying to make a RISC-V EC processor on it but I'm not sure how functional it will be.

If you check the twitter thread, he didn't create a CPU, or anything close to one. As far as I can tell, he just took some circuits that others created (e.g., debouncer, pwm) and hooked them up to create a 3 channel LED controller that can output a pulse signal. That's it. He did go through the rest of the flow (synthesis, STA, P&R, etc.) but it seems to be the core only, there's no pads or anything to connect the chip to a package, it's just the core logic.

He has not sent the design for fabrication (it would be rejected anyway) and doesn't seem to have a plan to do so. His plan is to now jump to reverse engineering a full GPU and tape that out. I give him an A+ for effort and self motivation, but he is not anywhere near as far along the path of designing any kind of real processor that he seems to think he is.

 

[CmdrShepard]

I wonder what the specs are and if he's actually gotten any code to run on it.

This article sports a clickbait headline which is as misleading as the one about the developer "hacking" Denuvo DRM.

The headline says "Engineer creates CPU from scratch in two weeks" and burries the lede again by leaving the most important detail for the end.

CPU has not been created -- it has only been designed.

We don't even know if his design was validated and whether he wants to tape it out, let alone what kind of CPU he was designing (i.e. 32-bit or 64-bit? RISC or something else? How many registers? Size of instruction set?).

We don't have ballpark figures on the node size it will be made in, how many CPUs will be made, how much it's going to cost, as well as what are expected power consumption, working frequency, and performance.

We don't know whether he already has a dev toolchain for it nor whether he even intends to follow up and write some code for it.

We don't get any information about the Tiny Tapeout 6 but are left to research that on our own.

Oh, and we don't get any information about what university this guy has finished if any. People studying computer science on university of electrical engineering in my country get to design their own RISC CPU as part of their study so this is maybe nothing more than putting that kind of knowledge to use.

TL;DR -- Instead of providing us with useful info like what I just enumerated above, this vapid, pointless, article does literally no effort to answer any of the questions its lack of facts raises.

 

[CmdrShepard]

If you check the twitter thread, he didn't create a CPU, or anything close to one. As far as I can tell, he just took some circuits that others created (e.g., debouncer, pwm) and hooked them up to create a 3 channel LED controller that can output a pulse signal. That's it. He did go through the rest of the flow (synthesis, STA, P&R, etc.) but it seems to be the core only, there's no pads or anything to connect the chip to a package, it's just the core logic.

He has not sent the design for fabrication (it would be rejected anyway) and doesn't seem to have a plan to do so. His plan is to now jump to reverse engineering a full GPU and tape that out. I give him an A+ for effort and self motivation, but he is not anywhere near as far along the path of designing any kind of real processor that he seems to think he is.

Thank you for doing the research the author of this miserable clickbait fluff article didn't bother to do before submitting it. If I could have upvoted you more than once I would have.

 

[bobhuff0]

A Titan CPU?

 

[DevL0rd]

I've done this in 3 days before.

https://circuitverse.org/users/17603/projects/16-bit-computer-be083c00-104f-4bec-bfea-0cdc0126e9bc

Only experience was MC redstone lol

There is more of us nerds out there than you think ❤️

 

[bit_user]

I've done this in 3 days before.

Let us know when you get it fabbed.

 

[DevL0rd]

Let us know when you get it fabbed.

like the guy that made one in 2 weeks, I have no desire to actually build it.

The interactive simulation on circuitverse is enough for me to have fun with the concepts.

 

[rfdevil]

I've done this in 3 days before.

https://circuitverse.org/users/17603/projects/16-bit-computer-be083c00-104f-4bec-bfea-0cdc0126e9bc

Only experience was MC redstone lol

There is more of us nerds out there than you think ❤️

Cool project. There is a world of difference between plugging behavior models in a more system simulator type environment and building a processor from scratch though, which was the original claim.

 

[adammaj]

If you check the twitter thread, he didn't create a CPU, or anything close to one. As far as I can tell, he just took some circuits that others created (e.g., debouncer, pwm) and hooked them up to create a 3 channel LED controller that can output a pulse signal. That's it. He did go through the rest of the flow (synthesis, STA, P&R, etc.) but it seems to be the core only, there's no pads or anything to connect the chip to a package, it's just the core logic.

He has not sent the design for fabrication (it would be rejected anyway) and doesn't seem to have a plan to do so. His plan is to now jump to reverse engineering a full GPU and tape that out. I give him an A+ for effort and self motivation, but he is not anywhere near as far along the path of designing any kind of real processor that he seems to think he is.

Importantly - I didn't even claim to make a CPU. That was completely made up from the article (not sure how they came to the conclusion that I built one). However, I am making a (very simple) GPU design right now, which I'll post about, and then maybe some of the skepticism everyone seems to have here will be dispelled.

 

[adammaj]

This article sports a clickbait headline which is as misleading as the one about the developer "hacking" Denuvo DRM.

The headline says "Engineer creates CPU from scratch in two weeks" and burries the lede again by leaving the most important detail for the end.

CPU has not been created -- it has only been designed.

We don't even know if his design was validated and whether he wants to tape it out, let alone what kind of CPU he was designing (i.e. 32-bit or 64-bit? RISC or something else? How many registers? Size of instruction set?).

We don't have ballpark figures on the node size it will be made in, how many CPUs will be made, how much it's going to cost, as well as what are expected power consumption, working frequency, and performance.

We don't know whether he already has a dev toolchain for it nor whether he even intends to follow up and write some code for it.

We don't get any information about the Tiny Tapeout 6 but are left to research that on our own.

Oh, and we don't get any information about what university this guy has finished if any. People studying computer science on university of electrical engineering in my country get to design their own RISC CPU as part of their study so this is maybe nothing more than putting that kind of knowledge to use.

TL;DR -- Instead of providing us with useful info like what I just enumerated above, this vapid, pointless, article does literally no effort to answer any of the questions its lack of facts raises.

Actually - a CPU has not even been designed. If you look in the thread (which is mine), I (1) never said I made a CPU (2) never said I designed a CPU. I'm actually in the process of designing a GPU right now though, and excited to share it!

 

[adammaj]

If you check the twitter thread, he didn't create a CPU, or anything close to one. As far as I can tell, he just took some circuits that others created (e.g., debouncer, pwm) and hooked them up to create a 3 channel LED controller that can output a pulse signal. That's it. He did go through the rest of the flow (synthesis, STA, P&R, etc.) but it seems to be the core only, there's no pads or anything to connect the chip to a package, it's just the core logic.

He has not sent the design for fabrication (it would be rejected anyway) and doesn't seem to have a plan to do so. His plan is to now jump to reverse engineering a full GPU and tape that out. I give him an A+ for effort and self motivation, but he is not anywhere near as far along the path of designing any kind of real processor that he seems to think he is.

Yep, thanks for clarifying 😄 - also not sure where your estimation of how far along I "seem to think I am" is coming from but I'm shipping my GPU design soon (it's very simple of course, and will is meant to be a proof of concept, not a functional/useful GPU)

 

[adammaj]

This would make more sense.

I struggle to accept that an engineer had no relatable experience in chip design before deciding to make one. The idea that one Monday morning this guy decided to build a cpu from scratch with no knowledge and then 14 days later its ready to go seems unlikely to me.

Genius level inteligence or down playing their own knowledge and experience? I believe that people go to university for years to learn the skills and knowledge to do this.

I didn't make a CPU, this article made that part up lol

 

[adammaj]

It's interesting to see the level of skepticism people have here (I'm the person in the post) 😄

Importantly (1) I didn't make a CPU here - the article just made that part up (it doesn't talk about that in my original thread (2) there was no obscuring of facts here. I think you can just learn a lot more and a lot faster than people expect (3) there's of course a lot I don't know still (most stuff)

And I'm working on the GPU right now - pretty confident that it's doable

Curious phenomenon that people become so skeptical with posts like these, interesting for me to observe. I didn't write the post nor did I realize it was going out, and there are several inaccuracies. But I'm happy to see that it was written about. But, everything I wrote in my tweet was true, no exaggeration.

 

[bit_user]

I didn't even claim to make a CPU. That was completely made up from the article (not sure how they came to the conclusion that I built one). However, I am making a (very simple) GPU design right now, which I'll post about,

Thanks for dropping in! Please feel welcome to share details and clear up any misconceptions. I hope you'll find a receptive audience.

Regarding the GPU, can you at least tell us:

• Will it be multi-core or just a proof-of-concept single-core design?
• Will it feature SIMD? How wide?
• What about SMT?
• VLIW?
• Will it have a classical cache hierarchy or just directly-addressed local memory?
• What about external memory? Will there be any? What type? Are you designing the memory controller or licensing it?
• Will it have a display controller? If so, what standards will it support? Again, license or build?
• Same questions for PCIe.
• What sort of special-function hardware will it have? ROPs? Texture engines?
• Will this be targeted at deploying on a FPGA or something designed for fabrication as an ASIC?

That's all I've got, right now. Feel free to answer as many or as few as you're comfortable speaking about.
: )

 

[adammaj]

Learning things quickly isn't always a good thing.


This is an example, by using verilog you are not programming hardware using software, verilog is not a software programming language, it is a hardware description language. Yes you could argue they mean using software to synthesize and implement the hardware but I doubt this is what they mean. Too many people, especially software engineers which they claim to be, treat verilog and VHDL as just another programming language.

Something definitely seems off too, it would be hard but possible to go from no knowledge to a basic CPU in two weeks, however it would not be any more than a demonstration, there is pretty much no way they went from no knowledge to an actually useful CPU in just two weeks unless they copied others work. Based on the fact they mention using some kind of AI and open source projects for learning this might be the case.

It could also just be that this is an awful design but it does technically work, maybe something like Ben Eater's breadboard computer that I believe only had 16 bytes of memory and was 8 bit. It does work well enough to run a simple program like incrementing a counter or performing basic calculations but it is not useful in any way other than just for learning.

If I remember bitluni's video on his tiny tapeout design then the cells they were allowed were very small and he pretty much implemented a ROM and he couldn't manage to fit much in, so it ended up being a very small ROM and even then used up 4 of the available cells (I think bitluni was given a chance just because they had space to fill so that may be why he was allowed 4 cells, also he wasn't given much notice or time to finish it which also probably also means it was just to fill space). So making a CPU within tiny tapeout, it either has to have no on board memory or it is a very very basic CPU with very little memory.

I think there is probably a reason that people haven't implemented usable CPUs (like RISC-V) on tiny tapeout before.

Edit: looking at tiny tapeout 6, someone may be trying to make a RISC-V EC processor on it but I'm not sure how functional it will be.

Verilog is still software by definition, regardless of the fact that it's a hardware description language. To clarify, my intention wasn't to say that I'm learning to create hardware with the software programming paradigm (which is clearly not what it is), but that I was designing hardware with programming generally which was still a cool unlock. Of course, the actual programming paradigm is very different from regular software.

Re: CPU - I didn't create a CPU in this project, if you look in the tweet it never mentions that. Somehow this article made that part up. However, I am working on a GPU. And you're right that neither of these will fit on TT06

Re: "learning things quickly isn't always a good thing" - maybe the correct merge of these is, learn as fast as you can while fully digesting what you learn. Skipping over important stuff isn't good. Importantly, I'd say most standard learning tracks are far slower than they should be, hence my forcing function of learning quickly. There's certainly still value to taking time to fully digest what you learn.

Hope this clarifies some things!

 

[adammaj]

Thanks for dropping in! Please feel welcome to share details and clear up any misconceptions. I hope you'll find a receptive audience.

Regarding the GPU, can you at least tell us:

• Will it be multi-core or just a proof-of-concept single-core design?
• Will it feature SIMD? How wide?
• What about SMT?
• VLIW?
• Will it have a classical cache hierarchy or just directly-addressed local memory?
• What about external memory? Will there be any? What type? Are you designing the memory controller or licensing it?
• Will it have a display controller? If so, what standards will it support? Again, license or build?
• Same questions for PCIe.
• What sort of special-function hardware will it have? ROPs? Texture engines?
• Will this be targeted at deploying on a FPGA or something designed for fabrication as an ASIC?

That's all I've got, right now. Feel free to answer as many or as few as you're comfortable speaking about.
: )

Thanks for the questions, didn't expect a response so quickly!

You can follow the GPU project here, it will be open source: https://github.com/adam-maj/tiny-gpu
So far I haven't added any of my work except for the file structure (which will likely change).

The aim of the project is to make a very simple readable GPU with 0 depth file structure + <10-20 files so it's very straightforward to understand, and then to use it in a blog post I'll be making to help people understand the core concepts of GPUs without all the complexity of a full implementation.

Given that, my current design has:
- 12 instruction ISA
- Multi-core (I think that's kinda critical)
- SIMD/SIMT - I'm currently thinking just 2-4 cores, and each core has a warp size of 4 threads per warp.
- Each core will have it's own warp scheduler/queue, fetcher/decoder, 1 ALU per thread, 1 LSU per thread, and branch unit
- Haven't decided yet on shared/cache memory but it seems important. Currently I'm using external memory w/ DRAM and the LSU will handle the async here & a register file for each thread in each core.
- No display controller/memory controller, as it will mainly be designed for simulation. I suspect TinyTapeout cells wont be able to hold the actual design, so I'll use the GDS visualizer + simulation for this project, and maybe make a much smaller version for TT06 or use a different design.
- No VLIW, no SMT (in general, the way im thinking about it is that most things that are CORE to the GPU architecture model I'll include, many things that are useful optimizations (which in reality are also core in modern GPUs in practice), I'll exclude from my design and spend time talking about them in the blog post)
- No PCIe
- No special function hardware - you can think of it like a GPGPU (by technicality). I've written some kernels with my ISA (matadd/matmul for now, and 2 more planned)
- Not targeted for FPGA, just for ASIC

Hope this answers your questions - regardless of the skepticism I'm just happy people are interested enough to post their thoughts/skepticism/questions

 

[poopititty]

It's interesting to see the level of skepticism people have here (I'm the person in the post) 😄

Importantly (1) I didn't make a CPU here - the article just made that part up (it doesn't talk about that in my original thread (2) there was no obscuring of facts here. I think you can just learn a lot more and a lot faster than people expect (3) there's of course a lot I don't know still (most stuff)

And I'm working on the GPU right now - pretty confident that it's doable

Curious phenomenon that people become so skeptical with posts like these, interesting for me to observe. I didn't write the post nor did I realize it was going out, and there are several inaccuracies. But I'm happy to see that it was written about. But, everything I wrote in my tweet was true, no exaggeration.

This is awesome!! (and I hope you end up taking the skepticism as healthy and keep posting your details)

As someone who spent who spent whole semesters with classes learning this stuff and now professionally designs chips, I think the skepticism for me came from just simply that my mind auto-processed the "click bait" title in a "wait, this sounds like a mismatch from how long I remember it took and 'ihtfp' vibes from how hard it was from that particular college" way lol.

And I hope the tomshardware writer keeps writing what some are calling "clickbait" articles like this, because it baited me and most likely I would not have clicked it if it said " guy learns small fraction of chip design in 2 weeks" or " guy spends a year taking a vlsi course" lmao. I'd 100% rather be baited by this than read another " analyst positive on Nvidia stock" newsfeed ( or Kayne/Bianca stuff).

What got my (good) juices flowing is that I also agree that much of the way we learned things can be made more succinct in retrospect. And this whole aspect on how we learn is super juicy to me-- while someone said learning fast may not be good, I'd like to counter that learning is never a 1 size fits all, and for me, slow learning mixed w. fast learning intermittently seems to spark the best combo of aiding memory *but also* and perhaps more importantly challenges us to question our own learning and whether there could be alternative new ways. I think a lot of times thats the spark required for innovation. As a scientist and someone who regularly trains others I cannot overemphasize how much I love this aspect of what you're doing causes me to question my own learning.

I love thinking about how circuit designers learn software and how software designers learn circuits, how physicists approach math, and how mathematicians approach physics, etc. So please keep at it and keep giving us the juicy details! And also more articles like this tomshardware!

 

[rfdevil]

Yep, thanks for clarifying 😄 - also not sure where your estimation of how far along I "seem to think I am" is coming from but I'm shipping my GPU design soon (it's very simple of course, and will is meant to be a proof of concept, not a functional/useful GPU)

I may have been influenced by how the story was presented in the article, but even some of the screenshots in the twitter thread led me to think as much. For example, the step of, "design my first chip," having been completed. Not trying to offend, but you didn't design a chip, you designed part of a chip. Same thing with Step 7, "Reverse-engineering and designing a GPU from scratch." Neither are being accomplished (seems like you are designing more of a basic tensor math processor from building blocks rather than reverse engineering any GPU).

I am not trying to discount your work and motivation here. I do think that it is pretty cool that you would take this on as a self-motivated project and am happy to see you making progress. From appearances, though, it just seemed like the overarching proclaimed goals and the actual work being done weren't quite matching up. I do hope you continue to document your journey, it seems to have generated a lot of interest. Getting actual working silicon results is not an easy task and I wish you the best of luck in your project!

 

[bit_user]

this whole aspect on how we learn is super juicy to me-- while someone said learning fast may not be good, I'd like to counter that learning is never a 1 size fits all, and for me, slow learning mixed w. fast learning intermittently seems to spark the best combo of aiding memory *but also* and perhaps more importantly challenges us to question our own learning and whether there could be alternative new ways. I think a lot of times thats the spark required for innovation. As a scientist and someone who regularly trains others I cannot overemphasize how much I love this aspect of what you're doing causes me to question my own learning.

In my experience, there are many tasks someone can quickly learn to do adequately, but true mastery requires a firm grasp of fundamentals that you probably would sprint past in your rush to get something working. Also, it's easier to learn in a progression than to go back and learn the fundamentals, which is probably the biggest indictment against fast learning for anything where your eventual goal is to be highly competent or mastery.

I love thinking about how circuit designers learn software and how software designers learn circuits, how physicists approach math, and how mathematicians approach physics, etc.

In line with the above, I've seen hardware engineers, physicists, and mathematicians make a complete mess of software. I don't mean to imply this is typical for developers with those backgrounds, just that I've seen & heard it happen enough to be noteworthy. I believe what happens is they learn some basics of programming and it seems so simple compared to their core area of expertise that they don't bother ever to learn the more advanced concepts and techniques. The result is too often "write-only code" that's hard to understand or maintain.

To be fair, I wouldn't be surprised to hear a hardware engineer find a litany of issues with a board or chip design by someone who's primarily a "software person", since software rewards abstraction and generalization while quite the opposite often seems true in hardware design.