How RAM Timings Are Determined

hyrule571

Distinguished
Dec 7, 2010
280
0
18,790
Hello,

I'm wondering how RAM timings are determined from commonly known values like tCL, tRCD, tRP, and tRAS, to uncommon values like tRFC and tREF. Are these values determined by what the RAM tells a PC, or does the motherboard determine these values through POST?

The reason why I ask is because recently I had to replace my X58 motherboard. My first motherboard seemed to recognize RAM timings fine because I could boot into Windows and keep a stable 4.7GHz overclock on it. I did not touch the RAM timings at all on that motherboard.

Jump to recent times and now I have a functional PC because I absolutely had to change my RAM timings with this new motherboard. I manually configured my standard timings to 8-8-8-20. Following those values came manually configured tRFC and tREF values of 90 (initially 86, less is faster) and 495 (initially 509, more is faster). Before I mention overclocking again, my PC couldn't even boot up properly with everything completely stock. With my 4.73GHz overclock now (slightly higher than before), my RAM is running at 1232MHz at the previously mentioned RAM timings with great stability.

Thank you for your time.

*EDIT*
I should have mentioned what hardware I have, apologies.
CPU: Intel Xeon X5690 (rated for 3.47GHz, running at 4.73GHz)
RAM: 24GB (rated for 2133MHz, running at 1232MHz)
Motherboard: EVGA X58 141-BL-E760-A1
GPU: EVGA 780 Ti
PSU: EVGA 1000W G3
 
Solution
There are JEDEC and XMP timings stored in the SPD (Serial Presence Detect) EEPROM chip on the DIMMs. The DIMM manufacturer determines what timings are stored in the SPD chip. Memory training is used to determine timing values that aren't stored in the SPD chip.

Here's an example of the timings stored in a SPD chip:

AIDA64_Memory_SPD.jpg
There are JEDEC and XMP timings stored in the SPD (Serial Presence Detect) EEPROM chip on the DIMMs. The DIMM manufacturer determines what timings are stored in the SPD chip. Memory training is used to determine timing values that aren't stored in the SPD chip.

Here's an example of the timings stored in a SPD chip:

AIDA64_Memory_SPD.jpg
 
Solution

hyrule571

Distinguished
Dec 7, 2010
280
0
18,790
Thank you very much for providing a detailed yet short response at the same time. I searched for programs that retrieve this information from the SPD, and I came up with RAMMon. I now know my RAM's recommended timings at its rated speed from A to Z.