News IBM intros Telum II processor — 5.5GHz chip with onboard DPU claimed to be up to 70% faster

[Admin]

IBM's Telum II processor packs eight CPU cores and a 24 TOPS AI accelerator.

IBM intros Telum II processor — 5.5GHz chip with onboard DPU claimed to be up to 70% faster : Read more

 

[jp7189]

24 TOPs int8 seems really low. Why bother wasting the tranistors on that when any add-in accelerator would be many times that performance? E.g. an H100 is over 3,000 int8 TOPs.

 

[gg83]

24 TOPs int8 seems really low. Why bother wasting the tranistors on that when any add-in accelerator would be many times that performance? E.g. an H100 is over 3,000 int8 TOPs.

I think IBM has seen the future and they have a master plan.

 

[Blastomonas]

Seems weak compared to other offerings. Not sure what the appeal is.

Also don't see much value in quoting performance compared to its former gen. 70% improvement on crap is not an improvement. Besides, after 3 years I would expect at least as much.

 

[bit_user]

I really have to wonder how long the mainframe market is going to sustain critical mass to keep funding the development of these custom CPUs.

24 TOPs int8 seems really low. Why bother wasting the tranistors on that when any add-in accelerator would be many times that performance? E.g. an H100 is over 3,000 int8 TOPs.

I think it's because some of IBM's customers want AI capability with mainframe reliability. However, you're right that it's still very limiting. These things are way too expensive to achieve GPU-level performance through scaling, so this level of performance feels more like a tease than anything real.

 

[bit_user]

Seems weak compared to other offerings. Not sure what the appeal is.

The appeal is for businesses that are already locked into the mainframe ecosystem or who need the zero-downtime reliability. In some sectors & countries, there might even be regulatory requirements forcing them to use mainframes.

 

[NinoPino]

@Author
The follow sentence have something strange : "IBM introduced its new Spyre AI accelerator add-in-card developed in collaboration with IBM Research and IBM.". I suppose it should end with "...IBM Research."

 

[NinoPino]

24 TOPs int8 seems really low. Why bother wasting the tranistors on that when any add-in accelerator would be many times that performance? E.g. an H100 is over 3,000 int8 TOPs.

It is 24x8 = 192 TOPs. Not so low imho.
And considering the fact that any core can redirect the AI work on any accelerator, this means that it can work as 8x24, 1x192, 2x96, 24+168, and so on. Great flexibility.

 

[JRStern]

This is mainframe architecture?
What is a DPU - some kind of smart controller?
Ask me about old 360 models, a bit of 370s, but I haven't really looked at IBM architectures since before Y2K.

 

[Hotrod2go]

8 performance cores & bulk cache... perfect for gaming!

 

[gg83]

@Author
The follow sentence have something strange : "IBM introduced its new Spyre AI accelerator add-in-card developed in collaboration with IBM Research and IBM.". I suppose it should end with "...IBM Research."

IBM research collaboration with IBM Research team and IBM's own IBM research department.