News IBM, Samsung Develop VTFET Semiconductor Design for the Future

" "Simply" rearranging transistor layouts vertically can thus be more impactful than even node changes..."

Vertical manufacturing at this scale is not a "simple" rearrangement, and given the new transistor architecture. this change is considerably more involved than a mere node shrink.
 
The entire article is all about how it isn't "simple"; the "simply" is even within quotation marks, implying that it itself is an oversimplification of what had been previously described.
On the contrary, the article states this architecture is "free from the constraints" of the traditional difficulties of increasing transistor densities, then moves immediately on to discuss its benefits. Nowhere are the complexities of a new transistor design even touched upon, and in fact are summarized merely as no more than a "design principle", rather than an entirely new architecture.
 
Nowhere are the complexities of a new transistor design even touched upon, and in fact are summarized merely as no more than a "design principle", rather than an entirely new architecture.
Well, if you use Gate-All-Around as a starting point, all of the extra complexities from needing to dope semiconductor layers other than the silicon substrate are already there. Vertical channel transistors are quite possibly easier to make using fewer total fab steps than multi-channel stacked GAA FETs.