News Intel 14th Gen Meteor Lake CPUs May Embrace An L4 Cache

Meteor Lake should hit the retail market in the second half of this year.

But only the MOBILE parts. Mobile chips might hit the retail first, since I think the desktop variants might even get canceled. Because we would rather get "Raptor Lake Refresh" as a stopgap before Meteor hits the market. MTL-S might get a 2024 release date, if Intel indeed has plans for a desktop variant, according to rumors.

FWIW, just recently Hardware Times actually shared what looks to be an official Intel slide that seems to confirm the whispers about Meteor Lake for desktops being canceled. The updated roadmap reveals that Intel might only be planning to launch Raptor Lake-S processors in 2023; all mentions of Meteor Lake seem to have been scrapped.


View: https://twitter.com/OneRaichu/status/1606342626654896129
 
It doesn't look like the old version of L4 to me.
Those used a whole separate memory controller for the in package dram chip.
There were 2 concurrent controllers working and the combined latency was less than that of either.

Don't see another controller or a dram chip.

Maybe it is a big chunk of sram that can't be synced properly to work as L3. In this case it would be just a bit slower than regular L3.

And the application would be the same as the x3d, but without added thermal limitations.
 
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Oh, if so, then they are definitely* preempting AMD and its VCache hitting the Laptop market.

Interesting times ahead for Laptops!

Regards.
Exactly where my brain went too. Intuitive post as usual Fran. 😃

Its funny though now we're hitting sram scaling issues and cache has become the next big thing in processing with both Nvidia and AMD going all in with gpus and cpus in AMDs case... Now Intel is entering the fray. Interesting indeed.
 
Exactly where my brain went too. Intuitive post as usual Fran. 😃

Its funny though now we're hitting sram scaling issues and cache has become the next big thing in processing with both Nvidia and AMD going all in with gpus and cpus in AMDs case... Now Intel is entering the fray. Interesting indeed.
Thanks!

I could add that, generally speaking, ML workloads benefit a lot with big cache sizes, so this may also be Intel experimenting with it on lower end product models?

Intel has put out some very interesting contraptions before, so they're no strangers to them, so this may well be a one-off model that got leaked or something.

That being said, I hope I'm wrong and we do get more cache on both camps for Laptops and other low power devices that could make good use of it; cough cough Steam Deck cough cough

Regards.
 
I remember when L2 was a new thing, then L3, and now L4? When L5 coming out? lol
L1 is special, because it's separated into code & data. I'm not exactly sure when that separation first came to x86 - maybe Pentium Pro? That's the first time I recall a x86 CPU having L2 cache, anyway.

L2 is usually single-core, but sometimes shared between a pair or quad of cores.

L3 is usually global, but I think the scope of AMD's L3 is limited to a single CCD chiplet, at least insofar as who writes it.

Beyond that, I think any further caching domain is either shared between multiple physical CPUs (IBM Z comes to mind, here) or between multiple IP blocks (e.g. CPU + NPU + iGPU) and sometimes called SLC (system-level cache).
 
L4 cache isn't exactly new, not even in consumer CPUs. Intel did that in the 4th generation iirc? Might have been fifth. Been a couple years in any case.
The article does mention the eDRAM of certain Haswell & Broadwell SKUs. They also supported using the in-package HMC DRAM of Xeon Phi (KNL) as a cache. This is the first time I think they ever would be bringing L4 to truly mainstream models, however.
 
There is currently no size mentioned for the L4 cache but it is likely that this is going to be an eDRAM cache similar to the ones featured on older Broadwell CPUs.

This sounds a lot like the "Crystal Well eDRAM" that offered up to 128 MB of cache to the higher-end Iris Pro integrated GPUs all the way back in 2013.

But unlike Crystal Well which was a memory-side L4 cache that could be allocated to virtually any part of the chip, the ADM/L4 could be specifically allocated to the Intel Meteor Lake's GPU portion. Based on the die layout presented by Intel during HotChips 34, it looks like the L4 cache might fit into the SOC Tile but that remains to be seen.
 
The article does mention the eDRAM of certain Haswell & Broadwell SKUs. They also supported using the in-package HMC DRAM of Xeon Phi (KNL) as a cache. This is the first time I think they ever would be bringing L4 to truly mainstream models, however.
I was replying to someone who seemed very surprised that L4 cache is now appearently a thing. Just wanted to point out to them that it had been a thing already several years back, nothing more, nothing less. No implications about the article itself.

Edit:
This was apparently the top model of the 4th gen L4 cache models, but there were two others:

There was also a 5th gen chip I remember seeing in reviews back in the days, eg in PCGH, for e80€. So it at least was available to people.
 
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