Intel Announces 48-Core Cascade Lake-AP, Xeon E-2100 Processors

Blas

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I wonder why this announcement was made today, Nov the 5th. It probably has nothing to do with the fact that tomorrow, on Nov the 6th, AMD is holding its "Next Horizon" event to introduce the new 7 nm Zen 2 architecture. Probably. Although i'm guessing someone at Intel's marketing department has had to spend the weekend preparing these few slides :)
 

bit_user

Splendid
Herald

And yet still probably less than Nvidia's Tesla T40, which likely costs only 10% or 20% as much and burn far less power (50 - 75 W each).


Perhaps two of each die's UPI links are to each other, with one link each going to the outside. But I guess you could have a total of 4 links going to the outside for a fully-connected topology between all 4 dies in a 2-socket config. I just think it would scale better to have more connectivity between dies in-package, given that a single UPI link would probably still be a choke point for apps requiring substantial die-to-die communication.


Wow, that's a surprising indictment against EMIB. Quite a reversal, given how hard they were pushing it even within the past year.


For 12 memory channels, I imagine they must.

I wonder how many PCIe lanes they'll support. Dare we hope to see all 96 lanes per socket?


These look to be nothing more than the Xeon flavor of the Coffee Lake desktop CPUs introduced about a year ago. This uncharacteristically long lag - normally it's >= 6 months, IIRC. I might be interested in a Xeon version of the i9 9900K, but I guess that might take another year...
 

redgarl

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In catastrophe... and with unverifiable number.

 

Olle P

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Apr 7, 2010
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... Intel hasn't confirmed the chip only comes with two dies, ... That means the company may have designed an entirely new die or disabled four cores per 28-core XCC die
Why not 3x18 or 4x12 cores?
No matter which it will either suck a lot of power or run at a really low speed.

Absolutely Preposterous!

 

Grzegorz Wereszko

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Dec 6, 2013
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Fine print. 48 core vs 32 core Epyc (with SMT disabled)... so good work Intel.. . Guessing that they didn't learn from their recent i9 9900k review?
 
Nov 5, 2018
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I wonder if Intel's interposer design solves the problem AMD has with low-latency applications on multi-die packages.

http://www.scanproaudio.info/2018/08/24/threadrippers-2990wx-2950x-on-the-bench-just-a-little-bit-of-history-repeating/
 
Sep 20, 2018
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I can't see they price tag of this thing, being the fastest means nothing if it costs 5 times what the competition charges :)
 

PaulAlcorn

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Yup, we've pinged them for comment, awaiting an answer.
 

none12345

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So, this is 2 dies in 1 package, with no new connectivitiy between the dies? This is equivilent to 2 sockets into 1 socket, with all the problems that comes with 2 sockets still being there.

Intel has done this EXACT move in the past. The pentium D had 2 dies in 1 package that functioned exactly the same as it would have in 2 sockets. And this move was in response to AMD releasing the athlon 64 x2, which was the first consumer dual core processor. Since intel didnt have a dual core yet, their answer was 2 sockets in 1, and all the problems that came with that.

Rather intersting to see history repeating itself. Not exactly the same situation, but there are a lot of parallels.

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Note AMD's threadripper and epyc archs are also a 2-4 sockets in one approach. However, if the rumors about the 7nm versions are true, then it will be a much tighter integration, to the point its more akin to a single processor in a single socket then multiple. Cant wait to see what AMD has done on 7nm. Not that ill ever buy an EPYC chip(nor a xeon)...i have no use for big iron, but i want to see what they have.
 

derekullo

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I loved my Pentium D, there was no going back to my Pentium 4 after that.

I could do a virus scan and use the computer at the same time!!!

 

racksmith101

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We know that the chips will be massively overpriced and I can guarantee that the motherboards will follow the same preposterous pricing structure. Now how many raspberry pi's can I buy and connect together for that price? ($15000/($100 for 3)=450, 450x4 cores =1800 core distributed super pi computer. Lol
 
Nov 5, 2018
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From the first slide, I get the impression that they're comparing 48+48 cores (dual socket) vs 32-cores Epyc (single socket), on top of having HT off.

That would correspond to the 3.4x they claim. I don't see a single 48-core beating AMD the 32-core by 3.4x ...
 

siman0

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Well now we know where all the 14nm silicon has been going to... I bet yields for this thing suck the large D...
 

ddearborn007

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Hmmm

"That finally gives Intel an answer to AMD's core count advantage"

Actually no it does not. Talk as they say is cheap.....

Unless/until Intel has actually delivered a 48 core CPU to customers, this PR announcement is just lip service. And if Intel finally does deliver a 24, 32 or 48 core chip, given the huge power and heat problems Intel is having with its 18 core CPU's right now, it will most likely be running very low clock speeds of 1.8- 2ghz. And in all likelihood by the time Intel actually delivers these chips, AMD will be shipping it's 48/64 core Zen 2 chips running at much higher clock speeds leaving Intel still lagging behind. IMHO of course
 

redgarl

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SMT disabled...

2X48 cores vs 32 cores...

A bunch of numbers...

Seriously, how can Intel be trusted at all? I never seen a company like this. I think they should be nominated for worst company of the year. I hope they can beat EA 2nd place from a couple of years ago.
 

bit_user

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They're comparing AVX-512 vs. 256-bit AVX 2.0 on EPYC.

https://en.wikipedia.org/wiki/AVX-512
 

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