News Intel Architecture Day 2021: Intel Unveils Alder Lake, Golden Cove and Gracemont Cores

[Admin]

Intel shared the details of its Alder Lake processors and its Golden Cove and Gracemont cores at its Architecture Day 2021.

Intel Architecture Day 2021: Intel Unveils Alder Lake, Golden Cove and Gracemont Cores : Read more

 

[TerryLaze]

• Alder Lake does not support AVX-512 under any condition (fused off in P cores, not supported in E cores).

Called it that all they need to do to get power draw down to ryzen levels is to turn off avx.
If they also locked down power limits, at least on non OC boards, they can sell it as super future low power tech.

 

[JWNoctis]

No AVX-512 at all?...Yeah, that's gonna be a rather huge regression for those applications that made use of them, which is admittedly uncommon in consumer space.

But then there's not that much difference between Core, Pentium, and Celeron lines anymore, unless they are going to detune IPC in microcode or something. What's the name of the next one, I wonder?

 

[TerryLaze]

No AVX-512 at all?...Yeah, that's gonna be a rather huge regression for those applications that made use of them, which is admittedly uncommon in consumer space.

But then there's not that much difference between Core, Pentium, and Celeron lines anymore, unless they are going to detune IPC in microcode or something. What's the name of the next one, I wonder?

Rocketlake didn't get any pentiums or celerons, no reason to believe that alder lake will have them.
Now the celeron (atom) is going to be integrated in the core... 😛

 

[NightLight]

Promising stuff... great time to buy some shares!

 

[Giroro]

Intel keeps talking up how great their tiny gracemont cores are... But if 4 gracemont cores were able to outperform 1 Golden Cove core, then the entire CPU would be gracemont. I think its no coincidence that their desktop CPUs tacked on exactly enough tiny cores to confuse people into thinking they have parity with 16-core ryzen. Just like how they renamed their 10nm process to give the illusion of parity.

I have no confidence whatsoever that their 8C/8c/24t processor has better multithreaded performance than a hypothetical 10C/0c/20t processor. If that were the case, then the configurations would be more like 0C/40c/40t... Or maybe even 2C/32c/36t.

But no, this is all about how they can technically get away with selling what is essentially an 8 core processor, using a giant sign that says 16 CORES* WORLD'S BEST EFFICIENCY**!
They at least know performance matters a little bit, because a 40 CORE CPU has to got be pretty tempting to somebody in their marketing department, regardless of how bad it would be.

 

[Johnpombrio]

This will probably be my next CPU replacing my i9-9900K. I need at least PCI-4.0 for my 2TB Samsung 980 Pro ($313 lightning deal in Amazon Prime day in June). I will never need all of these cores tho.

 

[mdd1963]

Cautiously optimistic, but, I recall feeling the same way before 11th gen released...

This time I will be pessimistic until happily (hopefully) proven wrong.

(Need some BF1/BF5 1080P benchmarks to truly know if Alder Lake is 'mo betta'!)

 

[JamesJones44]

Intel keeps talking up how great their tiny gracemont cores are... But if 4 gracemont cores were able to outperform 1 Golden Cove core, then the entire CPU would be gracemont. I think its no coincidence that their desktop CPUs tacked on exactly enough tiny cores to confuse people into thinking they have parity with 16-core ryzen. Just like how they renamed their 10nm process to give the illusion of parity.

I have no confidence whatsoever that their 8C/8c/24t processor has better multithreaded performance than a hypothetical 10C/0c/20t processor. If that were the case, then the configurations would be more like 0C/40c/40t... Or maybe even 2C/32c/36t.

But no, this is all about how they can technically get away with selling what is essentially an 8 core processor, using a giant sign that says 16 CORES* WORLD'S BEST EFFICIENCY**!
They at least know performance matters a little bit, because a 40 CORE CPU has to got be pretty tempting to somebody in their marketing department, regardless of how bad it would be.

How do you explain M1s multi thread performance then, the quote makes little sense. There is a lot more to CPU design than the number of cores and their single thread IPC. I don't claim to know if they will be able to compete with a 10 big core CPU, but the M1 and other hybrid architectures prove that very good multi thread performance can be had with the big little design.

 

[ezst036]

I think its no coincidence that their desktop CPUs tacked on exactly enough tiny cores to confuse people into thinking they have parity with 16-core ryzen. Just like how they renamed their 10nm process to give the illusion of parity.

There may be some of that, but Intel at this point can afford to cede some of the high end to AMD. They don't have to outright win, they just have to be competitive enough. And Intel is also prepping to fight AMD as well on the GPU front.(also nVidia)

Intel's biggest threat is ARM. They cannot afford to keep taking it on the chin any longer in mobile. Alder Lake big.little will be a game changer even if it doesn't get the final mile to energy efficiency utopia.

But really, I think people also forget or they discount that the pressure from manufacturing also is playing a factor here. Intel's fab woes go back how many years now? Intel needs small cores partially, and manufacturing woes in all sectors of chip manufacturing is going to force AMD to do the same with big.LITTLE. They've got Jaguar or Bobcat or whatever the latest iteration of that little core was, it won't be long before it's tacked on for some AMD big.LITTLE also.

16 big cores is simply more stress on manufacturing than 8 big and 8 small when you factor in the big picture and tons of silicon wafer after wafer after wafer. Alder Lake helps Intel to help Intel out on their fab woes.

 

[ezst036]

How do you explain M1s multi thread performance then

You only need one word.

Optimization.

Apple controls all aspects of MacOS, and are particularly fans of cutting off their own customers after so many years. They don't want, don't need, and simply don't carry a lot of legacy "baggage" - even if you spent $8000 on your computer. Apple will cut you off.

You explain M1 performance with optimizations under the hood.

 

[coolestcarl]

The Empire Strikes Back
Cue Darth Vader music (who does not like Darth Vader anyway, he is the original anti-hero hero).

As much as I am a great fan of AMD, I do like good competition better. The consumers are the ultimate winner in a good contest. This of course depends a lot on market conditions being open and free (like not taking up a competitors production wafer allocation from their foundary chip supplier, cough cough). Still cant fault the architectural merit of Intel's latest showing.

 

[Howardohyea]

so apparently Thread Director is a Windows 11 exclusive feature? Sheesh that throws my plan to use Windows 10 as long as possible out of the window if I'm going to buy an Alder Lake platform.

Windows might actually perform better thanks to better resource management than Linux lol

 

[Tech0000]

No AVX-512 at all?...Yeah, that's gonna be a rather huge regression for those applications that made use of them, which is admittedly uncommon in consumer space.

But then there's not that much difference between Core, Pentium, and Celeron lines anymore, unless they are going to detune IPC in microcode or something. What's the name of the next one, I wonder?

and that decision kills Alder lake for me and my org. We've had 5 years to optimize libraries for AVX-512 (since launce of the 79xx on X299 and corresponding Xeons) and are now able to get great performance at acceptable power consumption and are able to run on Sky lake, Ice lake and Tiger lake CPUs (even on laptops). With the AVX-512 fuse off decision on consumer CPUs, intel kills all this code and all gains (regressing to AVX2).
So the hope now goes to Sapphire Rapids and that there will be competitively priced HEDT CPUs and corresponding laptops parts (W series), and that potentially AMD's AVX512 implementation hopefully reaching consumer grade CPUs. but the potential to target a broad roll out to all modern consumer grade CPUs is gone.😡

 

[RodroX]

"Alder Lake comes to market in Fall 2021" lets hope it does.

Nice article, and I hope this work well for intel, not only because AMD needs to be spanked in the behinds a little bit to keep them in place, but also because it will mark a "new" approach to "regular" x86 desktop cpus.

As for the technology point of view, seems awesome no matter the standing point of view. How well will it perform? I guess we will have to wait, something we learn over the years is to not trust makers/developers claims.

Mixing high performance and high efficient cores have worked well for cell phones and some laptops, Will be fun to see how good will it be for standard PCs and Workstations.

 

[samopa]

I have no confidence whatsoever that their 8C/8c/24t processor has better multithreaded performance than a hypothetical 10C/0c/20t processor. If that were the case, then the configurations would be more like 0C/40c/40t... Or maybe even 2C/32c/36t.

Not all tasks can be parallelized, and not all that could, can be parallelized indefinitely, most of them could only be parallelized four times (with the exception matrix operations), that's why (I suspect) Intel stop comparing in 4 threads because after four threads, the advantage will be diminished.

Because of all things above, I have confidence that 4C/4c/12t will perform better than 0C/12c/12t in most normal use case. I also have confidence that 4C/4c/12t will also perform better than 0C/16c/16t albeit their deficit of threads number (12 vs 16) in most of normal use case. Thus, these make Intel will not take the all E core route (all P core route is possible), and the sweet spot is combination of both E and P Core.

 

[JWNoctis]

and that decision kills Alder lake for me and my org. We've had 5 years to optimize libraries for AVX-512 (since launce of the 79xx on X299 and corresponding Xeons) and are now able to get great performance at acceptable power consumption and are able to run on Sky lake, Ice lake and Tiger lake CPUs (even on laptops). With the AVX-512 fuse off decision on consumer CPUs, intel kills all this code and all gains (regressing to AVX2).
So the hope now goes to Sapphire Rapids and that there will be competitively priced HEDT CPUs and corresponding laptops parts (W series), and that potentially AMD's AVX512 implementation hopefully reaching consumer grade CPUs. but the potential to target a broad roll out to all modern consumer grade CPUs is gone.😡

This may come to a point where you buy access to specialized instruction set extensions like AVX-512 like you buy FPU in the days of 8086 - 80386, just with unlock keys tied to the processor and stored in the TPM.

Which may at least solve the access problem, but it would be a dark, dark future.

 

[Howardohyea]

This may come to a point where you buy access to specialized instruction set extensions like AVX-512 like you buy FPU in the days of 8086 - 80386, just with unlock keys tied to the processor and stored in the TPM.

Which may at least solve the access problem, but it would be a dark, dark future.

That reminds me of the i3 2102, which turns into an i3 2153 with faster core clocks and more cache if you pay 50 bucks more Paying For a Faster CPU Speed - Intel's Secret Processor That Cost $50 To "Unlock" - YouTube
If this is what you mean, but with AVX instructions

 

[ingtar33]

Intel keeps talking up how great their tiny gracemont cores are... But if 4 gracemont cores were able to outperform 1 Golden Cove core, then the entire CPU would be gracemont. I think its no coincidence that their desktop CPUs tacked on exactly enough tiny cores to confuse people into thinking they have parity with 16-core ryzen. Just like how they renamed their 10nm process to give the illusion of parity.

I have no confidence whatsoever that their 8C/8c/24t processor has better multithreaded performance than a hypothetical 10C/0c/20t processor. If that were the case, then the configurations would be more like 0C/40c/40t... Or maybe even 2C/32c/36t.

But no, this is all about how they can technically get away with selling what is essentially an 8 core processor, using a giant sign that says 16 CORES* WORLD'S BEST EFFICIENCY**!
They at least know performance matters a little bit, because a 40 CORE CPU has to got be pretty tempting to somebody in their marketing department, regardless of how bad it would be.

I don't think it's this complicated.

There are 3 reasons for the big-little core design

1. they wrote a californian law to try to ban chip competition from AMD in certain small formfactor designs, the law specifically called for a Big-Little design and intel was the no.1 driver of the law which passed years ago and is going into effect now. Simply put the design is to push AMD out of some of the market via lobying
2. the way intel calculates TDP will be exploited by this design; with the small cores pulling down the TDP / core by about 1/3, allowing them to effectively ship 120W TDP chips (as they calculate it) and put a 86W TDP sticker on it.
3. in mobile devices this design will stretch battery power pretty good

 

[JayNor]

"The high-performance cores do feature the Golden Cove architecture that supports AVX-512 natively, but Intel has fused that feature off"

Today's article contradicts this ... the avx-512 is not fused off. It is there, and can be enabled if the OEM provides the access in the bios.

Looks to me like this is basically just a work-around for an OS that can't handle the multiple cpu types. We know Intel can run code on GPUs with DPC++, so it shouldn't be too hard to support multiple CPU types.

 

[Tech0000]

"The high-performance cores do feature the Golden Cove architecture that supports AVX-512 natively, but Intel has fused that feature off"

Today's article contradicts this ... the avx-512 is not fused off. It is there, and can be enabled if the OEM provides the access in the bios.

Looks to me like this is basically just a work-around for an OS that can't handle the multiple cpu types. We know Intel can run code on GPUs with DPC++, so it shouldn't be too hard to support multiple CPU types.

so the denial machine is in full swing and anand tech's Ian Cutress quickly came to Intel's "rescue" and got a denial of this contradiction to help set the record straight.

https://twitter.com/x/status/1449080507229216769

View: https://twitter.com/IanCutress/status/1449080507229216769?ref_src=twsrc%5Etfw%7Ctwcamp%5Etweetembed%7Ctwterm%5E1449080507229216769%7Ctwgr%5E%7Ctwcon%5Es1_&ref_url=https%3A%2F%2Fvideocardz.com%2Fnewz%2Fintel-confirms-alder-lake-p-h-mobile-specs-publishes-hybrid-architecture-optimization-guide-for-developers


I do not for one second believe that intel releases a guide like this in October and make a big mistake like this. More likely is that Intel actually have not fused it off but is keeping it available so that with the right new CPU uCode and BIOS setting you can enable AVX-512. I mean why fuse it off if you can turn it off or on with uCode/bios setting (at no power cost if off)? Could be the windows 11 scheduler needs some more work to make it work well...