News Intel Axes Rialto Bridge GPUs, Delays Falcon Shores to 2025

rluker5

Distinguished
Jun 23, 2014
833
539
19,760
Almost like Intel is trying to match the release rate of it's competitors now.

And seeing how poorly cache scales with node, I wonder if they will put some cache under the GPU/CPU dies? They could do it on some older node like 14nm.
 
  • Like
Reactions: KyaraM

InvalidError

Titan
Moderator
And seeing how poorly cache scales with node, I wonder if they will put some cache under the GPU/CPU dies? They could do it on some older node like 14nm.
A cache on 14nm would still be much bigger for the same capacity, slower and consume more power than one made on 7nm, so you'd still want to make the cache dies on one of the smallest processes it still makes sense to make SRAM on. What you can still make on 14nm is interposers and all manners of front-end IO stuff that doesn't scale well at all since it needs to handle relatively high current (5-20mA) signals.
 

bit_user

Titan
Ambassador
It seemed like Ponte Vecchio ran pretty far behind schedule and I'd guess maybe Rialto Bridge was as well, to the point where its sales window ran well into that of Falcon Shores. Either that, or maybe takeup of PVC has been so poor that Intel was concerned it couldn't recoup the costs of the very incremental improvement that was to be Rialto Bridge.

I wonder if Falcon Shores will have any ray tracing cores. It was a little surprising to hear that Ponte Vecchio has them.
 
Last edited:
  • Like
Reactions: KyaraM

Giroro

Splendid
Don't you need to have "releases" in order to have a "release cadence"

Did Intel lose all the people who know how words work... Along with all the people who know how to make semiconductor products
 

Maebius

Splendid
Feb 17, 2017
162
42
23,540
I would bet that they realized they had to do better to compete, that's why they skipped a "generation".

I put the generation in quotes as they've gotten complacent while every "new" one is a very light step up, usually just a refresh from the previous.

If their reentry to the GPU market had their ARC 750/770s initially priced at 200/250 mark, they'd sell much much better. They're not worth any more by a longshot.
 
  • Like
Reactions: bit_user
At the rate Intel has been cancelling stuff, one could wonder whether it will have anything new to sell in 2025.
They have. Cancelling things is not necessarily, or completely, a bad thing. Or so I'd like to spin it in Intel's case: that means they can focus on what clients are actually demanding and/or consolidate products and remove redundancy. That is: looking at / thinking of* the wider portfolio. Skipping certain products due to delays is never good, but it's better than trying to do another Rocket Lake, but for Enterprise (who are a less forgiving bunch, I'd say).

Regards.
 

InvalidError

Titan
Moderator
Skipping certain products due to delays is never good, but it's better than trying to do another Rocket Lake, but for Enterprise (who are a less forgiving bunch, I'd say).
Comet Lake is the biggest dud among recent generations in my book: still basically using Skylake cores, was supposed to have PCIe 4.0, only got 3.0, was supposed to have 4.0x4 for the primary M.2 slot from the CPU, didn't get any, Intel dropped support for pre-Xe IGPs, etc.
 
  • Like
Reactions: KyaraM and bit_user

bit_user

Titan
Ambassador
I would bet that they realized they had to do better to compete, that's why they skipped a "generation".
Right. Ponte Vecchio seems barely competitive, and specs indicate Rialto Bridge doesn't do enough to close the widening gap with AMD and Nvidia. On paper, it looks like maybe 33% or so potential improvement (25% more shaders * slightly higher GHz from greater power limit).

I put the generation in quotes as they've gotten complacent while every "new" one is a very light step up, usually just a refresh from the previous.
Was Rialto Bridge meant to use the same manufacturing nodes as PVC? I see that PVC claims TSMC N5 for the compute tile, so at best they would probably go N4 (which is supposedly just a refinement of N5) and that's probably not worth a lot.

The biggest potential benefit of a refresh on the same or similar nodes would be adding new features, but PVC does seem to pack in quite a lot, already. So, maybe it's just trying to apply the same "Raptor Lake" mentality to their HPC GPU.
 
  • Like
Reactions: Maebius

bit_user

Titan
Ambassador
Comet Lake is the biggest dud among recent generations in my book:
Yes and no. If given the option to buy either Coffee Lake R or Comet Lake, I'd definitely take Comet Lake. It's a dud, only if you judge it by the standard of a full new generation.

However, what makes it look a little better is that Rocket Lake had some regressions (mostly in perf/W) and actually performed a little worse in a couple highly-threaded benchmarks, due to dropping core count.

IMO, the biggest dud was Kaby Lake, which really did nothing other than increase power limits, just for the benefit of a few more 100 MHz. At least the 3 generations after it actually added more cores. Then, Rocket Lake added a new uArch, AVX-512, and PCIe 4.0. Kaby Lake brought virtually nothing to the table.

was supposed to have 4.0x4 for the primary M.2 slot from the CPU, didn't get any,
It's not much consolation, but at least they doubled the DMI connection to x8. I expected that to shrink back to x4 when the speed increased, but now it's x8 @ PCIe 4.0. That's good for hanging some NVMe drives off the chipset.
 

InvalidError

Titan
Moderator
It's not much consolation, but at least they doubled the DMI connection to x8. I expected that to shrink back to x4 when the speed increased, but now it's x8 @ PCIe 4.0. That's good for hanging some NVMe drives off the chipset.
Only if you have a Z-series motherboard. Technically, the H-series also has x8 DMI but almost no motherboards are made with it anymore and most of what few do are priced well into Z-territory so it may just as well not exist.

Me, I have an i5-11400 on a B560 board, so I need that CPU-hosted NVMe slot to conserve chipset IO and bandwidth. Loss of cores at the highest-end is nowhere near my radar.
 

Jimbojan

Distinguished
May 17, 2017
84
37
18,560
Intel's Ponte Vecchio ( Xeon Max) is starting at about the same time with NVDA A100, intel has claimed that it is faster than 2x of A100, delaying the next generation is not a problem comparing to AMD or NVDA, Intel knows that. There is no need to ramp the new product while the demand is slowing down; Intel’s computation design skill is by far better than AMD for that matter better than NVDA in AI and other arithmetic computation design. Intel is trying to save its resources, not to waste it to get ahead of the competitor too much. Paul Acorn, your comment is clearly erroneous, at best.
 

bit_user

Titan
Ambassador
Intel's Ponte Vecchio ( Xeon Max)
You mean "Xe Max". I never liked the "Xe" name, mostly because it's too easily confused with Xeon. Especially if you consider that it's the chemical symbol for xenon, which again looks and sounds way too much like xeon.

Xeon Max is also a thing, referring to their HBM-equipped Xeon CPUs.

is starting at about the same time with NVDA A100, intel has claimed that it is faster than 2x of A100, delaying the next generation is not a problem comparing to AMD or NVDA, Intel knows that.
LOL, no. Nvidia is already on the H100. I'm not sure exactly when it started shipping, but they started their PR ramp for it nearly a year ago.

Here's how PVC compares with the A100 and H100, on paper (as a bonus, I added AMD's MI250X):

MakeModelNodeBF16 Tensor (dense)BF16 Tensor (sparse)fp32 (TFLOPS)fp64 (TFLOPS)Memory Bandwidth (TB/s)Interconnect Bandwidth (TB/s)Power (W)
AMDMI250XTSMC N6
383​
383​
47.9​
47.9​
3.28​
0.8​
560​
IntelDC GPU Max 1550TSMC N5
839​
839​
52.4​
52.4​
3.28​
?​
600​
NvidiaA100 SXMTSMC N7
312​
624​
19.5​
9.7​
2.04​
0.6​
400​
NvidiaH100 SXMTSMC 4N
990​
1979​
66.9​
33.5​
3.35​
0.9​
700​

See, it's a couple years too late. It has the same problem AMD routinely faces, which is that it's only competitive with Nvidia's previous generation. And like AMD's MI200-series, they went heavy on fp64, probably because HPC is a niche they think they can penetrate more easily than AI. Indeed Intel and AMD got the big government contracts, in that round.

BTW, if you can find a spec on the Xe Link, please let me know. I didn't look too hard, but all I could find is that PVC has 16 links. That doesn't help if I don't know how fast they are.

Intel’s computation design skill is by far better than AMD for that matter better than NVDA in AI and other arithmetic computation design.
That's awfully big talk, when Intel's AGX division is hemorrhaging money. I think Intel probably has the best chance of anyone at successfully entering these markets. However, their consumer and datacenter GPU products have gotten to market so late that even an otherwise flawless implementation is almost irrelevant. And if their datacenter GPU Max series is anything like what we've seen of the consumer Arc series, the execution is certainly far from flawless. Arc Alchemist looks a lot better on paper than how it performs in the real world.

Intel is trying to save its resources, not to waste it to get ahead of the competitor too much. Paul Acorn, your comment is clearly erroneous, at best.
I'm just going to leave this here. Bold statements should be backed by deep knowledge. Paul knows his stuff.
 
Last edited:

jp7189

Distinguished
Feb 21, 2012
470
278
19,060
They have. Cancelling things is not necessarily, or completely, a bad thing. Or so I'd like to spin it in Intel's case: that means they can focus on what clients are actually demanding and/or consolidate products and remove redundancy. That is: looking at / thinking of* the wider portfolio. Skipping certain products due to delays is never good, but it's better than trying to do another Rocket Lake, but for Enterprise (who are a less forgiving bunch, I'd say).

Regards.
They should stop releasing roadmaps. Making and breaking "promises" is how you lose trust.
 

bit_user

Titan
Ambassador
Well, that's a bit of an impossible ask for any open traded Company, I'd say?
That only pushes them to provide financial projections, I think. They have an obligation to communicate risks and challenges to their investors. If it can be proven that a company knew about a significant risk to their financial performance and didn't communicate that to investors, I think it would be grounds for a lawsuit. However, companies typically go further and try to provide quarterly and annual projections of their financial performance, without which I think investors tend to get nervous.

They should stop releasing roadmaps.
As for product roadmaps, you need to remember that Intel is mainly a component maker. CPUs and GPUs, primarily. By and large, they don't make end-user products (except for a few things like NUCs). They need an entire ecosystem to do things like making motherboards for their CPUs and designing PCs and laptops around them. They need software ecosystem partners to provide software support for their CPUs and to optimize games & other software for their GPUs. And because these partners are all businesses that need to make their own plans, they require a certain amount of visibility so they can have the proper resources for their part & make revenue projections of their own.

That's the main reason AMD and Intel make these roadmaps and distribute them among partners, even in spite of the fact that they're inevitably leaked. And, because they have roadmaps and leaks eventually do happen, they probably go ahead and show the roadmaps to investors at a certain point, in order to help control some of the rumors. FWIW, I can confirm that partners under NDA do see further into the future than what they communicate to their investors.

Making and breaking "promises" is how you lose trust.
Yes, and now that Intel has entered the semiconductor foundry business, they now have to provide a lot more detail about their semiconductor technology than ever before. The reason being that they need to lure customers to use their fabs. So, the public information they put out is to pique the interest of potential fab customers, so that they will then enter a NDA and get the full details. That also means this information should be a lot more firm than before, or else it could spell disaster for their fab customers.
 
Last edited: