News Intel Confirms On-Package HBM Memory Support for Sapphire Rapids

JayNor

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May 31, 2019
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0220H - HBM command / address parity error.
0221H - HBM data parity error.

That seems to be the only HBM info in the manual. It indicates that the memory controller has support for HBM. It would be a big jump to conclude this means there is HBM on-package.
 
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InvalidError

Titan
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That seems to be the only HBM info in the manual. It indicates that the memory controller has support for HBM. It would be a big jump to conclude this means there is HBM on-package.
Well, given the ball density of HBM modules and the requirement that traces between endpoints be too short for transmission line effects to be a major concern, any HBM has to be on-substrate with whatever chip hosts the memory controller by definition.
 

Chung Leong

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Dec 6, 2019
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0220H - HBM command / address parity error.
0221H - HBM data parity error.

That seems to be the only HBM info in the manual. It indicates that the memory controller has support for HBM. It would be a big jump to conclude this means there is HBM on-package.
Does it indicate even that much? I mean, the CPU could encounter an HBM error when it accesses HBM memory on an accelerator over CXL.
 

JayNor

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May 31, 2019
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Does it indicate even that much? I mean, the CPU could encounter an HBM error when it accesses HBM memory on an accelerator over CXL.
Yes, that is likely the use. The Xe-HPC Ponte Vecchio GPUs will have stacks of HBM2e and the sketchy plans presented so far are for the Sapphire Rapids chips to access those GPUs via CXL .
 

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