Intel Drivers Bring Quick Sync Video to Pentium, Celeron

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Nolonar

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hey intel, how about releasing a "driver update" to enable hyperthreading in core i5 cpus? it might not help with gaming but it'll definitely help with ht-aware apps. just saying. :whistle: ange:
In case you weren't aware of it: it's called "i7".

Might as well ask Microsoft to add all features of Windows 7 Ultimate to Windows 7 Home Basic.
 

Murissokah

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hey intel, how about releasing a "driver update" to enable hyperthreading in core i5 cpus? it might not help with gaming but it'll definitely help with ht-aware apps. just saying. :whistle: :ange:
Hyper threading is not just software, some of the resources on the CPU need to be duplicated (namely registers and program interrupt controllers) in order to accommodate it.
 

dude30000

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hey intel, how about releasing a "driver update" to enable hyperthreading in core i5 cpus? it might not help with gaming but it'll definitely help with ht-aware apps. just saying. :whistle: :ange:
Hyper threading is not just software, some of the resources on the CPU need to be duplicated (namely registers and program interrupt controllers) in order to accommodate it.
Finally, someone who actually knows what he is talking about. Unlike the previous two smart ass
 

Back in the P4 days when Intel introduce HT, adding HT to a core added less than 5% die area and power and Intel used the same dies for both HT and non-HT parts. Back in the P4 days, parts of the pipeline were duplicated for each thread (more so in Prescott) but IIRC, Intel scrapped most of that duplication in favor of dynamic sharing when they resurrected HT in the i3/5/7 so the die area and power cost should be even lower than the original implementation.

AFAIK, Intel does not manufacture separate dies for i5 and i7 - at least I could not find mentions of different die sizes between 4C CPUs from the same generation using the same IGP. They simply fuse HT and 2MB of cache off.
 

jase240

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Intel first makes the i7 then they QC and bin it. CPUs that cannot properly use HT at i7 clock speeds get HT disabled and are turned into i5.CPUs that cannot use all 4 cores are then turned into i3sPentiums and Celrons at made seperatly with Cerlons being binned Pentiums.
 

pazuso

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So you can download 1080p porn and convert it to something smaller for your mobile device a.k.a. bathroom companion
 

The L3 cache banks are far more likely than HT circuitry to get a non-fatal defect hit. If a defect hits HT circuitry, it has a high probability of screwing up the whole core due to messing up decoding, scheduling, resource reservation and other parts of the pipeline that have to keep tabs on threads.

However, the bulk of i5 are likely perfectly good i7/Xeon1P cores that get castrated to meet SKU demand for lower-end parts.
 

jase240

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The L3 cache banks are far more likely than HT circuitry to get a non-fatal defect hit. If a defect hits HT circuitry, it has a high probability of screwing up the whole core due to messing up decoding, scheduling, resource reservation and other parts of the pipeline that have to keep tabs on threads.However, the bulk of i5 are likely perfectly good i7/Xeon1P cores that get castrated to meet SKU demand for lower-end parts.
That too, both points are probably true. The cost to make the CPUs is low enough for Intel to drop some to meet demand. The average computer is going to use an i3 or i5.
 

Murissokah

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I believe you are right, and I confess I have no idea how Intel goes about their production scaling nowadays. It would make sense that they simply "nerf" the parcel of their production that needs to be sold as lower-end products.

This does not, on the other hand, invalidate the fact that no software patch from Intel is going to enable those resources, as the previous commenter suggested.
 

You make it sound like I tried to disprove that when I was merely clarifying what was most likely to cause chips to get binned down due to defects and adding that most chips that get features fused off to fill orders were likely perfectly fine.
 
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