News Intel Engineer Outs Panther Lake Architecture on LinkedIn

[Admin]

A mysterious new CPU architecture and iGP, known as Panther Lake, was revealed by an Intel engineer on LinkedIn. The architecture is expected to come after Lunar Lake and could use Intel 20A.

Intel Engineer Outs Panther Lake Architecture on LinkedIn : Read more

 

[jkflipflop98]

Bruh. You have to take a required yearly training class where they specifically tell you not to post your projects on LinkedIn or any other social media. If he has six years at the company then he's passed this class six times and still managed to fumble the ball. Amazing.

 

[JamesJones44]

I used to work for a company that used to use job posts as a way to gain insight to what their competitors were working on and what technologies they might be using. They did it so well they were often able to predict with decent accuracy what the product would do once released. It allowed them to one up their competition fairly regularly. I learned in that job not to be overly specific in skill requirements and technologies when posting a new position.

 

[btmedic04]

EUV is a manufacturing process, not a transistor design

 

[MBOO7]

Whats the point of this article???
Intel is absolutely unreliable in terms of execution, so even any confirmed letter of intent is basically as good as worthless giving that.

 

[digitalgriffin]

EUV is a manufacturing process, not a transistor design

Yes and no. At 20A, you have to use GAA

BTW: Sometimes these "leaks" are intentional.

 

[jkflipflop98]

There's no surprises here. . . CPUs with integrated graphics will use the Xe GPU cores of their time. It's not really a secret - I'd file this under common sense.

 

[bit_user]

What's "3Dmk WLs"? 3DMark Workloads? It's a little odd to use such terse notation in a resume that might be unfamiliar to the reader. Furthermore, even more obvious abbreviations, like OpenGL as "OGL" will avoid matching anyone who's specifically searching on "OpenGL".

And why does Intel get the image credit? Wasn't it taken from LinkedIn, where it was posted by the employee themself?

20A is a major milestone for Intel and is the first node to enter the angstrom era, where the physical features of a chip can no longer be accurately measured in nanometers. Instead, the chips will be measured in angstroms...
This does not mean that the individual transistors are guaranteed to be below a single nanometer in size, just that the physical features can no longer be measured on the nanometer scale.

Please don't make such claims. 20A is a marketing name, only. No feature on those chips will be 20 angstroms or less. All you need to say about it, for people who haven't been paying attention, is that it's the node which comes after Intel 3.

Intel doesn't specify performance or wattage gains,

Then I think it's irresponsible to make specific claims about efficiency in the headline, based on simplistic extrapolation. Even if the extrapolation is correct, a lot of things affect efficiency, beyond just the process node.

 

[bit_user]

Whats the point of this article???

It just tells us which generation of Xe graphics will be used in which CPUs, which you can see in the screenshot. That's it. The rest of the article is just filler.

There's no surprises here. . . CPUs with integrated graphics will use the Xe GPU cores of their time.

It did clarify one thing for me, which is the timing of Arrow Lake. I had thought it would be a successor to Meteor Lake, but this suggests they're more contemporaneous and possibly just targeted at different market segments.

 

[Daniel Payne]

Yes and no. At 20A, you have to use GAA

BTW: Sometimes these "leaks" are intentional.

Correct, EUV (Extreme Ultra Violet) is a lithography approach used inside of the fabs to pattern transistors, vias, contacts and even metal lines.

Transistor architectures have gone through many generations: Bipolar, NMOS, CMOS, planar, FinFET (aka TriGate only at Intel), RibbonFET (aka GAA - Gate All Around, or Nanosheet).

The PowerVia technology will be used for power and ground interconnect through the backside of the thinned out wafer, while general interconnect remains on the topside of the wafer.

Performance and power savings on the planned nodes are very dependent on parasitic capacitance, resistance and even inductance, so let's wait and see what benefits the technology delivers.

We talk deeply about this semiconductor technology over at SemiWiki.

 

[jeremyj_83]

The rest of the article is just filler.

I wouldn't say it is quite filler. They are making a fair assumption about the performance/watt improvements. Hopefully those improvements do happen as Core hasn't been efficient since Skylake.

 

[whatisupthere]

Sounds like this should bring some definite improvement over the current architecture.... when it comes out in 2040

 

[The Historical Fidelity]

I highly disagree with the Intel BS marketing ploy that 20A and smaller processes can no longer be accurately measured in nanometers. 20A is 2nm and 18A is 1.8nm. It’s not even the appropriate measurement. Through the history of semiconductor processes, the measurements always jumped by 10^3 not 10^1. IE micrometers to nanometers then picometers. The only time I have ever seen angstroms being used is in biochemistry describing relative positions of protein sub-structures in 3D space. Just keep on using nanometers then when 0.9 nanometer process is created switch to picometer and call it the 900 picometer process.

 

[bit_user]

I wouldn't say it is quite filler.

It's no new information.

They are making a fair assumption about the performance/watt improvements.

First, the extrapolation is ridiculous. It's just blind and unnecessary speculation. If Aaron Klotz were a leading industry expert on the subject, I might care what he thinks the efficiency gains might be. Otherwise, his guess is just noise. A trained monkey can extrapolate trends, but semiconductor manufacturing is getting into a territory where there's no good reason to expect all of the various performance differentials between successive node names will be at all consistent.

Second, when semiconductor fabs announce efficiency improvements of a given node, it's iso-frequency. In other words, it presumes you ported the same design to the newer node, and ran it at the same clock frequency.

There's zero chance of Intel doing that, because competitive pressures will push them to increase complexity to increase IPC (Instructions Per Clock), and they'll probably burn most of the rest of the margin by increasing frequency.

It's one thing to publish articles about leaks and rumors. I'm not even too bothered about speculation, as long as it has all the right caveats (which it didn't, quite). But, to take such a blind leap and put it in the subtitle is really going too far.

Hopefully those improvements do happen as Core hasn't been efficient since Skylake.

Ah, but don't you see? That's entirely incongruous with what the article cited. I guarantee you that each Intel node since 14 nm has been more efficient than the last. That's not the reason Intel's more recent CPUs have been burning so much power. Rather, that's because they've taken that efficiency dividend and invested it (and then some) into more performance. I see no reason to think they won't continue down that same path, in future CPU generations made on future nodes.

 

[ottonis]

Bruh. You have to take a required yearly training class where they specifically tell you not to post your projects on LinkedIn or any other social media. If he has six years at the company then he's passed this class six times and still managed to fumble the ball. Amazing.

Not necessarily! Intel could have purposefully launched this "leak" in order to strengthen its technological and financial outlook and build upon the brand "leadership" promise.

Nowadays, companies' net worth is much more determined by expectation than by actual performance.

 

[TerryLaze]

That's not the reason Intel's more recent CPUs have been burning so much power. Rather, that's because they've taken that efficiency dividend and invested it (and then some) into more performance. I see no reason to think they won't continue down that same path, in future CPU generations made on future nodes.

There is no reason for them to change something that is an industry standard since forever and for pretty much anything....
Anytime we have enough maturity in a process we get a product that pushes the limits, that's why we got the FX-9590 a decade ago and that's also why ryzen went with a 100% power increase for a 0% core increase this gen.

Everybody always complains about intel having locked CPUs but when they don't lock them this happens...everybody pushes them to way beyond the warranted limits and pretends that that's how they come "out-of-the-box" .

But, to take such a blind leap and put it in the subtitle is really going too far.

It says "Could be" and aaaaaaaaaaaanything "could be"

 

[frogr]

Aaron said,
“20A is a major milestone for Intel and is the first node to enter the angstrom era, where the physical features of a chip can no longer be accurately measured in nanometers. This does not mean that the individual transistors are guaranteed to be below a single nanometer in size, just that the physical features can no longer be measured on the nanometer scale.”

Aaron, you keep perpetuating the same misperception confusing node names with feature size . The intel/TMSC/Samsung node names do not represent physical dimensions of the features.
.
This table from WIKIchip https://fuse.wikichip.org/news/6720/a-look-at-intel-4-process-technology/2/ demonstrate that and also the fact the going from Intel 7 to intel 4 the features do not become 4/7 (0.57) times smaller.
.
Dimension (nm) . . . intel 7 . . intel 4 . . Scaling factor
.
contacted
polysilicon pitch . . . . 60 . . . . 50 . . . 0.83
Fin pitch . . . . . . .. . . . . 34 . . . . 30 . . . 0.88
Metal layer 0 pitch . . 40 . . . 30 . . . 0.75

yep we've entered the Angstrom marketing area

 

[usertests]

There's no surprises here. . . CPUs with integrated graphics will use the Xe GPU cores of their time. It's not really a secret - I'd file this under common sense.

I think I wasn't paying attention and assumed that Meteor Lake would have a Battlemage (Xe2) iGPU, so this is a bit of a reality check.

 

[frogr]

A mysterious new CPU architecture and iGP, known as Panther Lake, was revealed by an Intel engineer on LinkedIn. The architecture is expected to come after Lunar Lake and could use Intel 20A.

Intel Engineer Outs Panther Lake Architecture on LinkedIn : Read more

The LinkedIn post claims that these were revealed during Intel architecture day 2021 and 2022. If so, hardly news.

They key point is in the title "Read more" this is mostly click bait- ever notice how many ads show up when you try and read the comments. I count 34 including links to more TH clickbait.

 

[edzieba]

I highly disagree with the Intel BS marketing ploy that 20A and smaller processes can no longer be accurately measured in nanometers. 20A is 2nm and 18A is 1.8nm. It’s not even the appropriate measurement. Through the history of semiconductor processes, the measurements always jumped by 10^3 not 10^1. IE micrometers to nanometers then picometers. The only time I have ever seen angstroms being used is in biochemistry describing relative positions of protein sub-structures in 3D space. Just keep on using nanometers then when 0.9 nanometer process is created switch to picometer and call it the 900 picometer process.

The rest of the industry switched to "the nm means nothing" marketing names for nodes many years ago. Intel has merely finally joined them, due to too many (such as yourself) assuming the node name has anything to do with feature scale.

 

[zecoeco]

Overhyped --> Delayed --> Undelivered
¯⁠\⁠⁠(⁠ツ⁠)⁠⁠/⁠¯

 

[GenericUser]

Bruh. You have to take a required yearly training class where they specifically tell you not to post your projects on LinkedIn or any other social media. If he has six years at the company then he's passed this class six times and still managed to fumble the ball. Amazing.

With the amount of companies that have annual "check the box" training, I find most people tend to turn their brains off and just go through the motions to get through it as quickly as they can. This type of thing still happening while having the training in place to prevent this exact scenario from occurring doesn't shock me. This type of thing is why the insider threat will always be the biggest threat.

 

[bit_user]

assumed that Meteor Lake would have a Battlemage (Xe2) iGPU, so this is a bit of a reality check.

Yeah, I really didn't know what to expect. I'm actually a little surprised it's not.

The LinkedIn post claims that these were revealed during Intel architecture day 2021 and 2022. If so, hardly news.

I think that's worth a fact-check, because I'm pretty sure the details about which CPU would use which graphics weren't detailed at those events. And, apparently, nobody on this site or one other I follow had heard of Panther Lake, either.

Intel has merely finally joined them, due to too many (such as yourself) assuming the node name has anything to do with feature scale.

No... Intel gets a pass for unit-less names like "Intel 7" and "Intel 4". It's talking about Angstroms that gets them in trouble.

And it doesn't help that the author is mindlessly parroting their marketing on this, as if it's technically accurate.

 

[The Historical Fidelity]

The rest of the industry switched to "the nm means nothing" marketing names for nodes many years ago. Intel has merely finally joined them, due to too many (such as yourself) assuming the node name has anything to do with feature scale.

You assume too much young padiwan. Intel hasn’t merely joined them, they have broken through the glass roof of hypocritical naming schemes. Just because process node names have gone away from first gate length, then pitch, then smallest feature size, doesn’t mean changing measurement dimensions is par for the course. Switching to a short lived 10^-1 difference in dimension scale is nothing more than a marketing ploy. I can see it now, the mainstream media saying, “while Samsung and TSMC are struggling to break through the nanometer wall having just introduced 2nm, Intel is enjoying the lead already breaking into the Angstrom era with their new 20A process.” When in reality 2nm and 20A processes are the same measurement and are in the same process class since Intel rebranded their 10nm and newer processes to reflect parity with TSMC 7nm and newer processes.

 

[frogr]

I think that's worth a fact-check, because I'm pretty sure the details about which CPU would use which graphics weren't detailed at those events. And, apparently, nobody on this site or one other I follow had heard of Panther Lake, either.

May 29 2022, Hardwaretimes references Panther Lake: https://www.hardwaretimes.com/intel...lunar-lake-reportedly-an-experimental-design/

Jan 12, 2023 WCCFTECH list s Xe3 (Celestial) as the GPU architecture for Panther Lake in this article on lunar lake:

Intel Lunar Lake To Feature A Brand New CPU Architecture Built From The Ground-Up, Perf/Watt Focused at Mobile

Intel is working on a brand new CPU architecture designed from the ground for its next-gen Lunar Lake family of processors.

wccftech.com