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News Intel Explains Falcon Shores Delays, Ends Habana Gaudi Roadmap

"However, the CXL interface provides only 64 GB/s of throughput between elements"

based on what limitation in CXL?

Are you saying, based on a 16 lane PCIE5 bus?
 
The IPUs are taking over a lot of traditionally CPU owned territory. Perhaps Intel is getting schooled by google on the GPU only design of the initial Falcon Shores.

No mention yet of optical, which was hinted by R. Koduri.
 
I think it is up to 64 GB/s in each direction over 16 lanes.

32GT/s x16 for CXL 2.0

64GT/s x16 for CXL 3.0
 
lol @ the AI product line

"We're going to sell lots of AI chips! ...right John?"

"I think it was a fad"

"a fad?! what about all those people using Bing with chatGPT?"

"No one is using Bing sir"
 
Diamond Rapids is expected in 2025 timeframe, and with PCIE6/CXL 3.0 according to some leaks. It would make sense to delay the GPU a year to introduce the new CXL and PCIE6, if that's what they're doing.
 

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