It turns out when you're building capacity for customers you don't have yet in a capital intensive business you take losses? Who could possibly have guessed this was the case?!
I think this is the gist of the topic. I'm not sure where this discussion will lead to, but let me first say that investors need assurance and must be able to gauge the risks. This is the basis of my argument. I don't really want to debate whether the loss was really "a literal loss", but rather I want to imagine the risks involved in that quote-on-quote loss (or high capex, if preferable) and its implications for the next few years.
For their IFS it might play some role but even there, older more stable nodes are always still lucrative. If they can match the bulk of what tsmc offers, even without the top leading edge one, at similar prices then they will do fine.
You are talking as if intel is only a FAB.
I have to reiterate. I am not specifically referring to the loss of lead, but I specifically refer to the FAILURE of attempting to reach to the top. GloFo is doing fine, TSMC is still taking a lot of 28 nm orders too. But let's not confuse
intentional loss and
attempted failure. Two of which are in the opposite direction in terms of annual capex. Intel is struggling to keep its cash flow and revenue healthy during the last two years, and I'd argue the main driving factor (other than the competition) is still the overreliance on their fab.
Of course, I agree that my mention of "fabless" is a completely unnecessary metaphor, but let's not get carried away with that. They have the option to abandon or slow down their pursuit for the leading-edge and increase that outsourcing on the leading-edge nodes, something that Intel should strongly consider at this point.
For intel leading edge doesn't matter, what are people going to do?! NOT buy CPUs because they are not on the leading edge node wise, even though their performance is fine?!
At worst some people might wait a few years more but they will still upgrade.
Intel has to prepare a cut on gross margins, in that case. It's already below 40% last year, down from the 60%+ on their pre-pandemic era.
This is... not particularly accurate. Intel released Cannon Lake (so they could say they didn't lie about 10nm being production ready even though it wasn't) on the original 10nm node in 2018. This was followed by Ice Lake on a revamped 10nm which they just called 10nm pretending Cannon Lake never happened in 2019. Tiger Lake was built on 10SF and this was the first major node improvement to 10nm which allowed them to get respectable clock speeds in 2020. Alder Lake was built on 10ESF (renamed to Intel 7 when Intel did the node name normalization) bringing us to the current version of the 10nm manufacturing process in 2021. Sapphire Rapids is built on the same process node and its problems were largely twofold: bugs found in silicon which required restarting mass production and the complex quad tile nature of the design.
Sorry, I did mixed up in the ADL and SPR part, you did correct me there, I have to say thanks.
But I wanted to mention that 10 nm actually only turned out to be "a considerable thing" effectively in 2021, and "a proper node" effectively in 2022, more than 4 years after Intel demoed it for the first time. The recent average is around 16 to 20 months, for reference.
So the corrected paragraph would be:
They showed a working wafer and process in IEDM (Dec 2017), only to *meaningfully* release it [for clarity: refers to ANY 10 nm process] in (very late) 2020 in the form of Tiger Lake which went up to only 45 W (except the special ed. -HK). Sapphire Rapids [EDIT: NOT SPR, but ADL] was released very late at 2021, as one of its derivatives (later rebranded as Intel 7) that did end up decent [for clarity: went above traditional DT and HEDT TDP limits]. Though, immense damage was inevitable as Intel lost its long-held advantage [reason: 2022 was a very bad year for them, followed by an even worse 2023].
20A seems to be another one and done with regards to Intel high volume parts. Chances are it's still the node for Arrow Lake CPU tiles which should be out this year. We still don't have enough information from Intel to say any of this is concrete though. 18A brings Intel to approximate node parity with their competition according to the slides released with the presentation mentioned in the article. It begins shipping next year and is the first leading node Intel is selling to external customers.
Yes, correct, at least that's what Intel said.
But also, let's consider the facts first. 20A will be Intel's first mass produced GAAFET/MGFET (dubbed ribbonFET)
AND backside interconnect (dubbed powerVIA) process. Samsung is also currently doing MGFET for the 3 nm class, but performance improvements are still minimal vs. its 5/4 nm class process. Samsung had no mentions of backside interconnect on their 3 nm demo.
20A/18A is hence, tough on the technical and financial level, so to mass produce this at late 2024, the margins for the targets to meet is razor thin. Considering the odds, I think a delay to 2025, or even a 1H 2026 is perfectly reasonable. But to cover that, you either
need the 4/5 nm to "work" (in order to keep profit margins and cash flow in check) or
increase the outsourcing rate. Profit on the fab will go down, but added value would be imposed to other segments stemming from higher performance and volume. I of course, hope that Intel will be able to successfully pick either.
If either is not fulfilled, I've to say that there's no other choice here but to rely on huge bailouts by the US govt. I don't know how that will pan out, but I'd say that thanks to the USA's bureaucracy, the GOP, and Dem hardliners like Bernie, only 38bn USD is allocated towards subsidizing the Si-manufacturing sector.
Interesting times ahead for me. I hope you are as interested.
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