News Intel Lakefield 3D Foveros Hybrid Processors: Hot Chips 31 Live Coverage

[Admin]

Intel lays out the details on its new 3D Lakefield processors.

Intel Lakefield 3D Foveros Hybrid Processors: Hot Chips 31 Live Coverage : Read more

 

[mitch074]

Ooooh... So, Intel reinvented big.LITTLE and confuses 2.5D and 3D ("real" 3D stacking would have tridimensional circuits; here you have layers that communicate with one another, so 2.5D). Awesome indeed.

Meanwhile, ARM already moved to DynamIQ.

 

[nufelevas]

This is aimed only at the arduino/arm/phone/atom market, or also at the desktop PC?

 

[hannibal]

Eventually to PC too. Amd is Also planning stacked cpus... when remains to be seing.

 

[exroofer]

Soooo..... is this a 1 core, or a 5 core or.........
So they then put 6 or 8 or w/e of these on one chip?
Because THAT would be interesting.

 

[bit_user]

This is aimed only at the arduino/arm/phone/atom market, or also at the desktop PC?

I'd have thought it would be fairly low-end stuff. But, that 64 EU GPU says otherwise.

So, basically, ultra-thin laptops and 2-in-1 convertibles. Not desktops, though.

 

[bit_user]

How much DRAM gets stacked in-package? That doesn't seem big enough to be all of the system's memory...

Edit: I'm reading 4 - 8 GB. So, yeah, that's probably all of it.

 

[Growle]

May be a good thing for future gaming consoles, "extra-small" form factor PCs, and smart pillows.

I like the sound of Tiny Form Factor though.

 

[JayNor]

Is that LTE chip from Intel?
There are reports that this chip is being used in Microsoft's Centaurus. It appears to be a foldable notepad 2 in 1. I'd rather use something like that than a cellphone ... seems more useful to me. I wonder does the Apple deal prevent Intel from putting their LTE chips in this format.
https://www.extremetech.com/computi...surface-could-launch-in-2020-run-android-apps

 

[bit_user]

May be a good thing for future gaming consoles, "extra-small" form factor PCs, and smart pillows.

I like the sound of Tiny Form Factor though.

As I'm sure you know, smaller can sometimes mean more expensive, like how Apple's Airtops are more expensive than their baseline Macbooks.

It seems pretty clear to me that this is not going to be their cheapest SoC part. I don't expect to see it in Chromebooks (other than maybe a couple higher-end models), for instance.

And it's definitely not for gaming consoles, other than maybe portable ones like Nintendo Switch.

If you were building a PC (or even a NUC), there's no good reason to use such a highly-integrated, low-power product, especially having only one "fast" core.

 

[GetSmart]

It seems pretty clear to me that this is not going to be their cheapest SoC part. I don't expect to see it in Chromebooks (other than maybe a couple higher-end models), for instance.

Well, some Chromebooks also featured more expensive Intel's mobile Core SoCs (not just cheaper SoCs from Intel's Atom lineage), thus would not count that out either.

 

[JayNor]

We have the announcement now, that the Foveros technology Lakefield chip is in the Microsoft Surface Neo, which is pre-announced for fall of 2020.

https://newsroom.intel.com/news/microsoft-surface-event-2019/#gs.924w09

 

[bit_user]

We have the announcement now, that the Foveros technology Lakefield chip is in the Microsoft Surface Neo,

Hmmm... a weird chip for a weird device. Fitting.

 

[kinggremlin]

here you have layers that communicate with one another, so 2.5D).

That's what a 3D IC is. Ryzen with its chiplets sitting on an interposer would be a 2.5D IC.

2D vs. 2.5D vs. 3D ICs 101

 

[mitch074]

That's what a 3D IC is. Ryzen with its chiplets sitting on an interposer would be a 2.5D IC.

2D vs. 2.5D vs. 3D ICs 101

No - Zen 2 is 2D. The chips are side by side, same as they would be on a circuit board.

 

[kinggremlin]

No - Zen 2 is 2D. The chips are side by side, same as they would be on a circuit board.

From the link I posted that you didn't read:

A 2.5D IC/SiP using a silicon interposer
and through-silicon vias (TSVs)


Just for fun here's another link:

2.5D-IC, 3D-IC, and 5.5D-IC – stacked-die integration

"In 2.5D-IC designs two or more die are placed face down and side by side on a silicon interposer."


Zen is 2.5D. What Intel announced is a 3D IC.

 

[mitch074]

From the link I posted that you didn't read:

A 2.5D IC/SiP using a silicon interposer
and through-silicon vias (TSVs)


Just for fun here's another link:

2.5D-IC, 3D-IC, and 5.5D-IC – stacked-die integration

"In 2.5D-IC designs two or more die are placed face down and side by side on a silicon interposer."


Zen is 2.5D. What Intel announced is a 3D IC.

Oh, I did read it - it's all marketing speech and buzz words. When GUI started getting rendered in 3D hardware, strangely, those definitions were much different for stuff that is geometrically the same as what is demonstrated in your article (see : composited windows rendered in 3D actually considered 2.5D)
Case in point: how will we designate designs that actually use vertical data paths and logic, when "3D" is already used to designate interpenetrated but still planar parallel substrates?