Intel passed another milestone this week in the development of a key technology for creating processors that run more than five times faster than current chips.
The chipmaker announced Thursday that it has delivered the first standard-format photomasks for use with Extreme Ultraviolet (EUV) lithography. The technology is designed to allow chipmakers to embed ever smaller features on silicon, beginning with chips at the 70-nanometer level. Current processors are manufactured on a 180 nanometer micron process. Smaller features mean more transistors can be squeezed onto smaller pieces of silicon, making for greater computing power.
Because of EUV's relatively smooth road to development, most industry experts believe the technology will succeed today's Deep Ultraviolet (DUV) lithography as the technique used to manufacture chips running at speeds of 10GHz or more.
These new photomasks are critical to the success of EUV because they represent the technology necessary to use ultraviolet light to draw features on silicon wafers during the chip manufacturing process.
DUV lithography uses light with a wavelength of 248 nanometers that passes through the photomask, printing an image of the chip on silicon. But because most materials absorb UV light, researchers needed to come up with materials that reflect the wavelength of light (13 nanometers) used by EUV. The new EUV photomasks developed by Intel (Nasdaq: INTC) do so, making their delivery the next milestone in the development of EUV, Intel executives said.
"The reason this is a milestone is that photomasks that are used today are transmitted-light photomasks," said Curt Jackson, group leader for Intel's Advanced Resist Group.
Instead of transmitting light through the mask, as is done in current chip manufacturing, EUV uses its masks to reflect the ultraviolet light on to the wafer. To accomplish this, Intel and EUV LLC, a consortium charged with developing EUV technology, had to develop special coatings. The coatings consist of several layers of molybendium silicide, a mixture of molybendium and silicon.
Intel executives said that despite requiring the new molybdenum silicide coating, EUV photomasks will be able to use most of the same manufacturing tools as used in its current chipmaking facilities, saving time and development costs.
"Intel has shown that we can pattern EUV photomasks on a substrate that is similar to what we use today," Jackson said.
The masks, which were delivered to EUV LLC early in the year, will be used in the EUV Engineering Test Stand, the prototype EUV chipmaking machine, to print the first images on a silicon wafer using the process.
EUV LLC is a consortium including Intel, Advanced Micro Devices, Motorola, Micron Technologies, Infineon and the federal Sandia and Lawrence Livermore national laboratories. Most recently, IBM joined the group.
The 6-inch-square, 0.25-inch-thick masks include 200-nanometer features, which are reduced by a factor of four to print 50-nanometer features on the silicon wafer.
Intel's next goal is to develop masks that harbor 120-nanometer features and therefore can print 30-nanometer features on silicon.
Chips with 30-nanometer features are four generations ahead of the 130-nanometer manufacturing process Intel plans to launch later this year.
Pretty sweet sounding if you ask me
"We put the <i>fun</i> back into fundamentalist dogma!"
The chipmaker announced Thursday that it has delivered the first standard-format photomasks for use with Extreme Ultraviolet (EUV) lithography. The technology is designed to allow chipmakers to embed ever smaller features on silicon, beginning with chips at the 70-nanometer level. Current processors are manufactured on a 180 nanometer micron process. Smaller features mean more transistors can be squeezed onto smaller pieces of silicon, making for greater computing power.
Because of EUV's relatively smooth road to development, most industry experts believe the technology will succeed today's Deep Ultraviolet (DUV) lithography as the technique used to manufacture chips running at speeds of 10GHz or more.
These new photomasks are critical to the success of EUV because they represent the technology necessary to use ultraviolet light to draw features on silicon wafers during the chip manufacturing process.
DUV lithography uses light with a wavelength of 248 nanometers that passes through the photomask, printing an image of the chip on silicon. But because most materials absorb UV light, researchers needed to come up with materials that reflect the wavelength of light (13 nanometers) used by EUV. The new EUV photomasks developed by Intel (Nasdaq: INTC) do so, making their delivery the next milestone in the development of EUV, Intel executives said.
"The reason this is a milestone is that photomasks that are used today are transmitted-light photomasks," said Curt Jackson, group leader for Intel's Advanced Resist Group.
Instead of transmitting light through the mask, as is done in current chip manufacturing, EUV uses its masks to reflect the ultraviolet light on to the wafer. To accomplish this, Intel and EUV LLC, a consortium charged with developing EUV technology, had to develop special coatings. The coatings consist of several layers of molybendium silicide, a mixture of molybendium and silicon.
Intel executives said that despite requiring the new molybdenum silicide coating, EUV photomasks will be able to use most of the same manufacturing tools as used in its current chipmaking facilities, saving time and development costs.
"Intel has shown that we can pattern EUV photomasks on a substrate that is similar to what we use today," Jackson said.
The masks, which were delivered to EUV LLC early in the year, will be used in the EUV Engineering Test Stand, the prototype EUV chipmaking machine, to print the first images on a silicon wafer using the process.
EUV LLC is a consortium including Intel, Advanced Micro Devices, Motorola, Micron Technologies, Infineon and the federal Sandia and Lawrence Livermore national laboratories. Most recently, IBM joined the group.
The 6-inch-square, 0.25-inch-thick masks include 200-nanometer features, which are reduced by a factor of four to print 50-nanometer features on the silicon wafer.
Intel's next goal is to develop masks that harbor 120-nanometer features and therefore can print 30-nanometer features on silicon.
Chips with 30-nanometer features are four generations ahead of the 130-nanometer manufacturing process Intel plans to launch later this year.
Pretty sweet sounding if you ask me
"We put the <i>fun</i> back into fundamentalist dogma!"
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