News Intel Process Roadmap Shows 1.4nm in 2029, Two-Year Cadence

Darkbreeze

Titan
Moderator
Assuming they can ever get to, or past, 10nm, while actually providing a SUPPLY. Oh, who are we kidding. They can't even hit the supply margins on the much easier 14nm process, how do we expect them to reach 1.4nm in the next 10 years when they've been trying to get past 14nm for 5 years already.
 

bit_user

Splendid
Herald
I'll believe this when it happens.

I guess this was probably a leak, rather than an officially-released announcement, but Intel is currently at zero credibility on any manufacturing process improvements.

nterestingly, at the 10nm node, the roadmap shows a path towards a ++ and a +++ version, instead of the expected 10nm+ and 10nm++. It is unclear if Intel has renamed the nodes that were previously announced as 10nm+ and 10nm++, or if Intel has developed a fourth variant of 10nm.
Probably because the first-gen 10 nm was DoA. The 10 nm they're using for Ice Lake is already +.
 

InvalidError

Titan
Moderator
Assuming they can ever get to, or past, 10nm, while actually providing a SUPPLY. Oh, who are we kidding. They can't even hit the supply margins on the much easier 14nm process
There are fundamentally two reasons why Intel is behind on 14nm shipments, the first being sales of 14nm parts still growing faster than Intel can increase capacity, the other being 10nm being so many years overdue. If Intel ever manages to get its desperately needed 10nm breakthrough, it'll increase yield per migrated production line by 50+% and solve Intel's supply issues.

We'll see how good 10nm is turning out when the promised desktop Ice Lake finally launches (or fails to) next year. Going to be quite the embarrassment should desktop Ice Lake either show similar clock frequency regressions as mobile parts have or gets delayed into 2021. My bet is on desktop Broadwell-II: technically exists but nearly unobtainable beyond select OEMs.
 

Gillerer

Honorable
Sep 23, 2013
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Assuming they can ever get to, or past, 10nm, while actually providing a SUPPLY. Oh, who are we kidding. They can't even hit the supply margins on the much easier 14nm process, how do we expect them to reach 1.4nm in the next 10 years when they've been trying to get past 14nm for 5 years already.
You're stating them as if the 14nm shortage and troubles with 10nm development are two separate failures Intel has had, when in fact they're both one and the same.

Since they haven't been able to introduce new performance products on the 10nm node, their entire modern portfolio (down to chipsets - apart from a couple of variants reheated from the 200 to the 300 series, using 22nm) have been clogging the 14nm production lines.

There was no way for them to know to prepare for the multiple years' delay on the 10nm node, so building double the 14nm capacity from the start would have been seen as a bad investment; Had 10nm been on or almost on time, most of that capacity would have had too short a time to recuperate the investment costs (from use as a leading edge node for high-margin parts).

It seems even Intel sometimes fails to execute, but there is no reason to believe these troubles are anything but a fluke - they have billions to throw at R&D. If their original 10nm plans were - as some have postulated - too ambitious, I'm sure they've learned their lesson.
 
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InvalidError

Titan
Moderator
It seems even Intel sometimes fails to execute, but there is no reason to believe these troubles are anything but a fluke
We'll see in due time. It is still perplexing how Intel has allowed itself to slip two years behind everybody else by focusing on 10nm DUV while nearly everyone else is switching to 7nm EUV. All of that research into extending DUV had better pay dividends going into EUV or 10nm++++ is going to turn into an unmitigated waste of time and money.
 
Dec 11, 2019
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Assuming they can ever get to, or past, 10nm, while actually providing a SUPPLY. Oh, who are we kidding. They can't even hit the supply margins on the much easier 14nm process, how do we expect them to reach 1.4nm in the next 10 years when they've been trying to get past 14nm for 5 years already.
Wrong question. Silicon crystalline spacing is ~0.5nm. This means 1.4nm is approximately 3 atoms wide. +/- 1 atom at least for over/under exposure. Does one have enough control of the process to do this? No longer dealing with bulk property equations, must treat atoms as point charges rather than uniform parallel plates. Much more complicated to properly define a transistor (computationally intensive). Even if you can build a transistor at this size, can you economically characterize the process and take this to high volume manufacturing?? You really need to be changing something other than drawn size to get more density!
 

ingtar33

Illustrious
There are fundamentally two reasons why Intel is behind on 14nm shipments, the first being sales of 14nm parts still growing faster than Intel can increase capacity,
and water is wet? isn't this the definition for lack of supply? The reality is intel has been super binning it's chips to produce those high clocks on 14nm, in fact they've been super binning since skylake, which means 14nm has always been short of supply because yield has been poor from the very beginning due to the extreme binning they're doing. Now that has improved as the revisions have come, but this shortage is due to the high clock speed demands corperate put on the company, not due to some increased demand for intel processors. call it an artificial shortage caused by 14nm binning. (source? friend who work in the intel fab here in arizona, they also have other information about upcoming nodes too)

the other being 10nm being so many years overdue. If Intel ever manages to get its desperately needed 10nm breakthrough, it'll increase yield per migrated production line by 50+% and solve Intel's supply issues.
unlikely, 10nm was meant to compete with ARM, and when initially conceived was meant to be a low power low clock node with a nice IPC improvement, intel didn't expect AMD Ryzen to actually challenge them so they planned to launch on 10nm with roughly the same performance as skylake, just lower clocks. Ryzen blew up intel's plans for 10nm. It's not that the yields are poor on the node (they're not good mind you) it's that they're unable to clock the chips up much beyond 3ghz without dumping power into the chips, and due to the 3d design, the heat gets impossible to deal with long term. basically it's a node good for making mobile parts not HEDT chips.

We'll see how good 10nm is turning out when the promised desktop Ice Lake finally launches (or fails to) next year. Going to be quite the embarrassment should desktop Ice Lake either show similar clock frequency regressions as mobile parts have or gets delayed into 2021. My bet is on desktop Broadwell-II: technically exists but nearly unobtainable beyond select OEMs.
intel already canceled 10nm icelake desktop chips. it will be a mobile chip only, their next two desktop chips will be yet more 14nm revisions (comet and rocket lake). The plan is for the Golden Cove revision to be on 7nm, and the first desktop node improvement since broadwell and 14nm. Now the plan for 7nm desktop is to release late 2021 to early 2022. the problem is 7nm is a hasty redesigned process, remember how intel was planning on 10nm being an ARM competitive process? well so was original 7nm. They've been redesigning 7nm from the ground up to compete again in HEDT and are on a rushed schedule, so no one knows how 7nm will work, but while certain segments of intel are really hopeful for the process the guys I know here are really skeptical as it's really being rushed right now as intel mostly has given up on 10nm and their original designs for 7nm. They don't think intel will completely right the ship until 5nm.

of course this is full speculation, but when you consider in 2021 AMD will be close to releasing on 5nm, and their 7nm will have been on the market for a year, intel will be really running hard to catch up even if 7nm works.
 
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InvalidError

Titan
Moderator
isn't this the definition for lack of supply?
A lack of supply literally means the supply and the ability to increase it do not exist. Intel's supply does exist and it is being increased to offset delays. This is just a regular supply shortage from demand exceeding supply and likely continuing to do so until Intel catches up on process tech.

intel already canceled 10nm icelake desktop chips.
Intel is on-and-off about desktop Ice Lake. At first there was no announcement, then there were rumors, then Intel denied the rumors, then the rumors came on again with a possible launch in early 2020 and last I heard a month ago, Intel has confirmed desktop Ice Lake but no ETA nor specifics.
 

Gillerer

Honorable
Sep 23, 2013
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... You really need to be changing something other than drawn size to get more density!
Wasn't there just a news item about a successful proof-of-concept into "beyond-silicon" materials?

https://www.tomshardware.com/news/imec-fabricates-beyond-silicon-mos2-2d-transistors

*

BTW, the original article has been updated. Intel claims the node names were not from them, but had been added to the slide by ASML.

(It would be helpful if the staff dropped a quick note of an update in the discussion. Seems a bit futile to be discussing the finer points of a matter, if the originally presented details have since been called into question. Even now I only spotted the update because I went back to check some details.)
 
Reactions: bit_user
All I can say is, "Good luck with that intel. Your track record has been less than inspiring to date when it comes to your Lithography technology and security."

I more than believe intel has the skill necessary to create new architectures. They had more than 10 years to move past Core and they have Jim Keller. But the rest of the company suffers.

Theory is different than implementation. You could design the best architecture for all time, but it doesn't mean squat is the process technology isn't there.
 
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bit_user

Splendid
Herald
There are fundamentally two reasons why Intel is behind on 14nm shipments, the first being sales of 14nm parts still growing faster than Intel can increase capacity, the other being 10nm being so many years overdue.
A third reason is that, because 10 nm is late, they've had to add cores to their CPUs on the 14 nm node, which makes the dies bigger, which means fewer CPUs per wafer. So, their massive 10 nm failures have created a real logjam.

We'll see how good 10nm is turning out when the promised desktop Ice Lake finally launches (or fails to) next year.
...er, the server CPUs are due in Q1 or Q2. That will tell us a fair amount about yield, at least.

AFAIK, the desktop parts still aren't on any roadmap.
 

bit_user

Splendid
Herald
It seems even Intel sometimes fails to execute, but there is no reason to believe these troubles are anything but a fluke - they have billions to throw at R&D. If their original 10nm plans were - as some have postulated - too ambitious, I'm sure they've learned their lesson.
They had the same sorts of issues with their 14 nm node, which lead them to cull significant portions of the Broadwell generation and skip straight to Skylake. It seems to have been a miniature version of what happened with their 10 nm node.

I'm also not sure this was a "fluke". I think a failure of this magnitude can only happen if there are systemic problems in an organization. Issues like chronic lack of R&D investment, communications failures, lack of contingency planning, and a management culture of passing the buck.

However, I think they have learned a costly lesson and made some big changes. It's possible the next node transition will indeed go more smoothly.
 
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TJ Hooker

Glorious
Herald
Wrong question. Silicon crystalline spacing is ~0.5nm. This means 1.4nm is approximately 3 atoms wide. +/- 1 atom at least for over/under exposure. Does one have enough control of the process to do this? No longer dealing with bulk property equations, must treat atoms as point charges rather than uniform parallel plates. Much more complicated to properly define a transistor (computationally intensive). Even if you can build a transistor at this size, can you economically characterize the process and take this to high volume manufacturing?? You really need to be changing something other than drawn size to get more density!
AFAIK the name of a node (i.e. 1.4 nm) no longer corresponds to any real transistor/feature dimensions. In other words, there may not (probably won't?) be anything actually 1.4nm in size on a chip fabbed on a 1.4 nm node.
 
Dec 11, 2019
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A company still needs a vision to strive for followed by goals to work for... then comes the reality of what actually gets achieved.

I think you have to give Intel credit for the significant optimization they have made with 14nm. So much that they are still relevant when compared to the newer 7nm chips from AMD.

AMD will continue to improve their offerings and so will Intel. When Intel produces a 10nm/7nm/5nm chip, will it only be as good as the Ryzen? Will it be better/worse?
 

bit_user

Splendid
Herald
Wrong question. Silicon crystalline spacing is ~0.5nm. This means 1.4nm is approximately 3 atoms wide. +/- 1 atom at least for over/under exposure. Does one have enough control of the process to do this? No longer dealing with bulk property equations, must treat atoms as point charges rather than uniform parallel plates.
All good questions, but I think we don't know exactly what they're defining as 1.4 nm.
 

TJ Hooker

Glorious
Herald
unlikely, 10nm was meant to compete with ARM, and when initially conceived was meant to be a low power low clock node with a nice IPC improvement, intel didn't expect AMD Ryzen to actually challenge them so they planned to launch on 10nm with roughly the same performance as skylake, just lower clocks. Ryzen blew up intel's plans for 10nm. It's not that the yields are poor on the node (they're not good mind you) it's that they're unable to clock the chips up much beyond 3ghz without dumping power into the chips, and due to the 3d design, the heat gets impossible to deal with long term. basically it's a node good for making mobile parts not HEDT chips.
Do you have a source for this? Has Intel ever set out to develop a node exclusively for mobile/low power before? As far as I'm aware they've used every one of there previous nodes across more or less their full product stack.
 
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bit_user

Splendid
Herald
A company still needs a vision to strive for followed by goals to work for... then comes the reality of what actually gets achieved.
Vision is useless without the means and competence to execute.

Roadmaps like this are nothing new, and I wouldn't even necessarily call them visionary. It's just a plan, and plans don't mean anything if you can't implement them.
 

bit_user

Splendid
Herald
Do you have a source for this? Has Intel ever set out to develop a mobile-/low power-only node before? As far as I'm aware they've used every one of there previous nodes across more or less their full product stack.
I've read someone saying that Intel has 3 variants of 10 nm, based on density, power, and clockspeed. I'm not sure if which or how many were originally planned vs. being a "+" node.
 

InvalidError

Titan
Moderator
AFAIK, the desktop parts still aren't on any roadmap.
They aren't on any roadmap I have seen either, but when confronted about the lack of any real new products for the desktop until 2022, Intel has said Ice Lake will be coming to desktop. Maybe the truth lies somewhere in-between with the new rumors of Sunny Cove getting back-ported to 14nm... kinda Ice Lake but without the 10nm part :)
 

Darkbreeze

Titan
Moderator
Wrong question. Silicon crystalline spacing is ~0.5nm. This means 1.4nm is approximately 3 atoms wide. +/- 1 atom at least for over/under exposure. Does one have enough control of the process to do this? No longer dealing with bulk property equations, must treat atoms as point charges rather than uniform parallel plates. Much more complicated to properly define a transistor (computationally intensive). Even if you can build a transistor at this size, can you economically characterize the process and take this to high volume manufacturing?? You really need to be changing something other than drawn size to get more density!
Not the wrong question, because there is little point in worrying about whether or not somebody who cannot even, give five years time to do so, get a viable 10nm product without overarching probems doing so, so even worrying about them at 1.4nm, especially in a few years, seems beyond pointless. Maybe they'll have breakthroughs somewhere along the way, but it's just as likely that they'll continue to encounter difficulty because if there is one thing we've learned from Intel through the years it's that they like to stay in a nice comfortable rut when they believe they can do so, and they do, or did. Now that they realize they might not have the leisurely timeframe to work out their problems like they believed they would since there was no realistic competition for so long, maybe they'll be forced to switch gears but I'm not sure that will actually happen either. Guess we'll see.
 
May 31, 2019
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Intel has been recently stating that their 10nm yields are now ahead of their projections. They are shipping Ice Lake, Lakefield, NNP-I and Agilex 10nm products.

They mentioned one issue that makes more sense as the reason for the 14nm backlog. They were expecting to provide 50% of the iphone modems, and were instead awarded 100% contract. Add to that, Apple recently increased that order by 10% to 88 million. That's a lot of 14nm LTE modems.
 

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