News Intel receives first High-NA EUV chipmaking tool from ASML — Intel is the first pathfinder for revolutionary new lithography tech

[Admin]

Intel receives the first components of ASML's High-NA EUV scanner.

Intel receives first High-NA EUV chipmaking tool from ASML — Intel is the first pathfinder for revolutionary new lithography tech : Read more

 

[peachpuff]

The two companies will begin assembling the machine shortly

Don't let intel near it...

 

[HaninTH]

Does it come with auto renewing support contracts for the life of the device? What's the return policy on this sort of kit? Do they provide return shipping labels?

 

[rluker5]

I like how ASML compares the step from DUV to EUV to the step from EUV to high NA EUV.
It probably won't be that big of an improvement, but it will still be one.

Intel had a lot of troubles getting to 10nm on DUV and old EUV will probably give TSMC the same kind of troubles if they try to reach high NA EUV nodes with old EUV.

 

[strobolt]

I'm a total noob when it comes to the chip manufacturing but wanted to ask that how is it possible to produce 1,8 nm process nodes with 8 nm resolution? Does this have something to do with how I've heard it being said that 1,8 nm nodes are not really 1,8 nm but it's more of an marketing tactic?

 

[thestryker]

I like how ASML compares the step from DUV to EUV to the step from EUV to high NA EUV.
It probably won't be that big of an improvement, but it will still be one.

Volume of production wise it probably is that big, but in terms of allowing more density probably not.

Intel had a lot of troubles getting to 10nm on DUV and old EUV will probably give TSMC the same kind of troubles if they try to reach high NA EUV nodes with old EUV.

I don't think they'll have the same level of problems in terms of getting it to work. They will have the same exact problem with regards to cost scaling though which isn't sustainable.

I'm a total noob when it comes to the chip manufacturing but wanted to ask that how is it possible to produce 1,8 nm process nodes with 8 nm resolution? Does this have something to do with how I've heard it being said that 1,8 nm nodes are not really 1,8 nm but it's more of an marketing tactic?

Fabrication node names have been completely meaningless since Intel released 22nm, TSMC 16nm and Samsung 14nm as they all switched to FinFET transistors.

 

[Eskimou]

I'm a total noob when it comes to the chip manufacturing but wanted to ask that how is it possible to produce 1,8 nm process nodes with 8 nm resolution? Does this have something to do with how I've heard it being said that 1,8 nm nodes are not really 1,8 nm but it's more of an marketing tactic?

You are correct that 1.8nm seems beyond a 8nm resolution. Rayleigh's equation tells us that the minimum CD is equal to a k1 factor times wavelength over numerical aperture. Theoretical k1 limit typically used is 0.25. So CD = 0.25 *(13.5nm/0.55) results in a CD a little over 6nm, 8nm is a fair assumption as it gives a little lee way since it's almost impossible to reach a perfect 0.25 factor.

The industry has been producing sub theoretical for some time through the use of multiple exposure patterning and other "tricks" of the trade like self aligned double or quadruple patterning. While specific techniques are closely guarded secrets you can read about general techniques here: https://en.wikipedia.org/wiki/Multiple_patterning