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Intel Releases Itanium 9500 Poulson Manual

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"First spotted by the folks over at CPU World, the document provides detailed information about the 32 nm, 3.1 billion processor CPUs."

Processor ... I'm pretty sure that should be transistor.
 
Itanium is low priority for development funds, it tends to be one to two years behind Intel's desktop offerings. And honestly I don't blame them, HP is the only one developing systems for Itaniums. Itanium doesn't compete with AMD it competes with IBM, Oracle (Sun) and their like in the HPC and enterprise world. These are specialized systems running very specific tasks with high cost software, Itanium's VLIW ISA just gets tore up. VLIW is bad design for a general purpose main CPU, good design for a DSP and GPU though.
 
When Google started their business, they used... Celeron processors in order to achieve their goals. Anyone using exotic processors, just wastes his money nowadays..
 
[citation][nom]palladin9479[/nom]Itanium is low priority for development funds, it tends to be one to two years behind Intel's desktop offerings. And honestly I don't blame them, HP is the only one developing systems for Itaniums. Itanium doesn't compete with AMD it competes with IBM, Oracle (Sun) and their like in the HPC and enterprise world. These are specialized systems running very specific tasks with high cost software, Itanium's VLIW ISA just gets tore up. VLIW is bad design for a general purpose main CPU, good design for a DSP and GPU though.[/citation]

Itanium uses EPIC, not VLIW. It's similar, but not the same, granted it still doesn't do too well. VLIW and it's direct derivatives seem to be bad for any workload that isn't embarrassingly parallel and without dependencies, not just poorly in general-purpose GPU workloads. Well, that is if AMD's VLIW GPUs are to be considered.
 
[citation][nom]Fancarolina[/nom]"First spotted by the folks over at CPU World, the document provides detailed information about the 32 nm, 3.1 billion processor CPUs."Processor ... I'm pretty sure that should be transistor.[/citation]
Yeah, I found that line interesting at first.

Who's the editor for Toms again?
 


EPIC is just HP / Intel's implementation of the VLIW design concept.

http://en.wikipedia.org/wiki/Very_long_instruction_word

Very long instruction word or VLIW refers to a processor architecture designed to take advantage of instruction level parallelism (ILP). Whereas conventional processors mostly only allow programs that specify instructions to be executed one after another, a VLIW processor allows programs that can explicitly specify instructions to be executed at the same time (i.e. in parallel). This type of processor architecture is intended to allow higher performance without the inherent complexity of some other approaches.

Traditional approaches to improving performance in processor architectures include breaking up instructions into sub-steps so that instructions can be executed partially at the same time (pipelining), dispatching individual instructions to be executed completely independently in different parts of the processor (superscalar architectures), and even executing instructions in an order different from the program (out-of-order execution). These approaches all involve increased hardware complexity (higher cost, larger circuits, higher power consumption) because the processor must intrinsically make all of the decisions internally for these approaches to work. The VLIW approach, by contrast, depends on the programs themselves providing all the decisions regarding which instructions are to be executed simultaneously and how conflicts are to be resolved. As a practical matter this means that the compiler software (the software used to create the final programs) becomes much more complex, but the hardware is simpler than many other approaches to parallelism.
Click to expand...

Any ISA that pass's multiple instructions as a single word to the CPU is a VLIW ISA. VLIW isn't a set of instructions, its just a concept / technique to implement ILP. This is also why GPU's are VLIW processors, even if they use different terminology's their still implementing multiple instructions as a single instruction word. Nearly every DSP in the world is also a VLIW CPU, for these same reasons.
 


No, although its market share is rather low. HP is the only OEM really building Itanium systems and the overwhelmingly run HP-UX. Mostly banks and other financial institutions have special software written for those HP systems.

The HPC world is very very slow to change, you tend to swap our your core hardware once every five to seven years and then you only swap it with stuff that has been out for a year or more (reliability is a major factor). The hardware cost is minor compared to the software and support costs.
 
[citation][nom]mayne92[/nom]Yeah, I found that line interesting at first.Who's the editor for Toms again?[/citation]

Tom's has editors?
 
[citation][nom]palladin9479[/nom]No, although its market share is rather low. HP is the only OEM really building Itanium systems and the overwhelmingly run HP-UX. Mostly banks and other financial institutions have special software written for those HP systems.The HPC world is very very slow to change, you tend to swap our your core hardware once every five to seven years and then you only swap it with stuff that has been out for a year or more (reliability is a major factor). The hardware cost is minor compared to the software and support costs.[/citation]
Why Itanium over x86 though?
 
[citation][nom]blazorthon[/nom]VLIW and it's direct derivatives seem to be bad for any workload that isn't embarrassingly parallel and without dependencies[/citation]

Reminds me a bit too much of Bulldozer. 😉
 
"3.1 billion processor CPUs..."

Damn, I just bought an i5 based QUAD core box and I am still not even close to being able to play with the cool kids 🙂


 
Oh dear... where's the sense of humour here?

The point I was alluding to was Bulldozer's inability to perform satisfactorily outside of heavy multitasking. That much has been proven. So yeah, it was a tenuous link, but I'm not quite sure it was completely without merit.
 
[citation][nom]silverblue[/nom]Oh dear... where's the sense of humour here?The point I was alluding to was Bulldozer's inability to perform satisfactorily outside of heavy multitasking. That much has been proven. So yeah, it was a tenuous link, but I'm not quite sure it was completely without merit.[/citation]

It can perform very well outside of heavy multi-tasking if you disable one core per module and then overclcok it. The FX-8120 and the FX-6100 are excellent CPUs to do this with. A 20-30% performance boost in performance per Hz (25%-30% being most common) and an easy path to 5GHz even on the stock cooler lets them fight with the non K edition i5s in performance per core, granted they are not as power efficient (still far better than not disabling one core per module and for multiple reasons).
 
[citation][nom]palladin9479[/nom]EPIC is just HP / Intel's implementation of the VLIW design concept.http://en.wikipedia.org/wiki/Very_ [...] ction_wordAny ISA that pass's multiple instructions as a single word to the CPU is a VLIW ISA. VLIW isn't a set of instructions, its just a concept / technique to implement ILP. This is also why GPU's are VLIW processors, even if they use different terminology's their still implementing multiple instructions as a single instruction word. Nearly every DSP in the world is also a VLIW CPU, for these same reasons.[/citation]

That's more of an argument of semantics than anything. There are other arguably minor details inherent to VLIW processors, so it's not entirely true either. You're taking the name a little too literally.

[citation][nomWikipedia][/nom]Outside embedded processing markets, Intel's Itanium IA-64 EPIC appears as the only example of a widely used VLIW CPU architecture. However, EPIC architecture is sometimes distinguished from a pure VLIW architecture, since EPIC advocates full instruction predication, rotating register files, and a very long instruction word that can encode non-parallel instruction groups. VLIWs also gained significant consumer penetration in the GPU market, though both Nvidia and AMD have since moved to RISC architectures in order to improve performance on non-graphics workloads.[/citation]

http://en.wikipedia.org/wiki/VLIW#Implementations

Last paragraph of this section of the same Wiki article. Also, GPUs aren't all VLIW. Sure, many of AMD's GPUs are purely VLIW, but not all of them.

http://en.wikipedia.org/wiki/Graphics_Core_Next
 
Shit, I think I just sparked a flame war... *facepalm*


Either way, I was really just relating go the architectures being different. As far as bulldozer being a bad architecture, all I can say is that mine does everything unwanted it to and I have no complaints.
 
[citation][nom]fb39ca4[/nom]Damn, thats a lotta cores XD[/citation]

If I remember correctly, most of the die space goes to the huge SRAM L3 cache (something like 48MiB or 54MiB if I remember correctly), not the cores of which the article only mentioned there being eight.
 
[citation][nom]ashinms[/nom]Shit, I think I just sparked a flame war... *facepalm*Either way, I was really just relating go the architectures being different. As far as bulldozer being a bad architecture, all I can say is that mine does everything unwanted it to and I have no complaints.[/citation]

The architecture is excellent to an extreme. The non-architectural design problems are where issues begin to show up. These seem to be mostly attributable to AMD's management seemingly not wanting the processors based on the Bulldozer architecture to be designed anywhere near optimally.
 


Cell is getting old. It'd probably need a refresh before it's a real competitor anymore. It's also hard to code well for.
 
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