News Intel Roadmap Suggests No New High-End Desktop Processors This Year

[Admin]

Roadmap from Intel Partner Connect presentation shows that Intel isn't preparing any HEDT processors to launch this year.

Intel Roadmap Suggests No New High-End Desktop Processors This Year : Read more

 

[MasterMadBones]

...the chipmaker was unable to squeeze more than ten cores out of the 14nm chips within a reasonable power consumption envelope.

The biggest problem is die size. It's impossible to make more than 10 Skylake cores on a ring bus on 14nm within the LGA1200 package. It just gets too long.

 

[InvalidError]

It's impossible to make more than 10 Skylake cores on a ring bus on 14nm within the LGA1200 package. It just gets too long.

Intel can easily square up the chip's layout using either mesh or multiple ring bus topologies if it wanted to, only problem is that those don't fare particularly well in typical desktop applications due to increased and less uniform latency similar to how AMD's Zen incurs significant performance penalties when cores need to talk to each other through IF instead of intra-CCX.

Based on delid images, Comet Lake's die is still only about half the size Intel could possibly fit on LGA1200 if it really REALLY wanted to.

 

[hannibal]

Trange news... Intel just released its highend product. It is like telling that according amd roadmap it does not release new highend products after Zen3 release...

 

[TJ Hooker]

This article is about HEDT, i.e. LGA 2066 or its successor. Nothing to do with LGA 1200 or the recent mainstream Comet Lake release.

Intel hasn't used a ring bus on its HEDT chips for years.

 

[InvalidError]

This article is about HEDT, i.e. LGA 2066 or its successor. Nothing to do with LGA 1200 or the recent mainstream Comet Lake release.

I was merely pointing out to MadBones that 14nm isn't physically limited to 10 cores, plenty of space even on LGA1200 to push 20 if Intel really wanted to, the implication of which being that even more would be technically feasible (but not necessarily sensible) on LGA2066.

 

[MasterMadBones]

Intel can easily square up the chip's layout using either mesh or multiple ring bus topologies if it wanted to, only problem is that those don't fare particularly well in typical desktop applications due to increased and less uniform latency similar to how AMD's Zen incurs significant performance penalties when cores need to talk to each other through IF instead of intra-CCX.

Obviously it's not completely impossible, we've seen double rings before. But as you said, it would be bad for gaming, which is pretty much Intel's last bastion so that would be a terrible idea for the desktop range.

Beyond a weird U-shaped layout, a single ring bus will always grow in just one dimension.

 

[InvalidError]

Obviously it's not completely impossible, we've seen double rings before. But as you said, it would be bad for gaming, which is pretty much Intel's last bastion so that would be a terrible idea for the desktop range.

Beyond a weird U-shaped layout, a single ring bus will always grow in just one dimension.

HEDT CPUs always take a hit in gaming due to the non-uniform latency in HCC/XCC setups.

Latency goes up with the number of stops on ring busses too, that's why Intel never made CPUs beyond 12 cores per ring and has gone mesh for its newer HCC/XCC chips.

 

[spongiemaster]

The biggest problem is die size. It's impossible to make more than 10 Skylake cores on a ring bus on 14nm within the LGA1200 package. It just gets too long.

This is about HEDT, not the LGA1200 socket. The topend HEDT chips haven't used a ring bus for years. I have no idea what THG was trying point out from what you quoted. Intel released an 18 core HEDT CPU 2 and 1/2 years ago. It's not the core count that's killing power, it's taking a 5 year old architecture and pushing it to 5Ghz+ clock speeds that takes 14nm out of its optimal power curve. With a better architecture, they wouldn't need to push the clock speeds so high.

You can't even buy Cascade Lake X now, no surprise Intel isn't going to release anything new this year. They've given up on HEDT as the chips they can currently produce have no real market.

 

[InvalidError]

It's not the core count that's killing power, it's taking a 5 year old architecture and pushing it to 5Ghz+ clock speeds that takes 14nm out of its optimal power curve.

A newer architecture will INCREASE clock-for-clock power draw due to increased complexity, not reduce it. That's why more advanced architectures require a more advanced process to keep timings, die size and power in check. Power-wise, Intel's 14nm is still doing quite well at stock boost, no real problem there.

 

[spongiemaster]

A newer architecture will INCREASE clock-for-clock power draw due to increased complexity, not reduce it. That's why more advanced architectures require a more advanced process to keep timings, die size and power in check. Power-wise, Intel's 14nm is still doing quite well at stock boost, no real problem there.

I didn't say a new architecture running at the same clock speeds as the previous one would lower power draw.

 

[bit_user]

It's impossible to make more than 10 Skylake cores on a ring bus on 14nm within the LGA1200 package. It just gets too long.

I don't see why they couldn't go with a 4x3 layout. You could run the bus part way in between the two halves, to bring connectivity to the inner two cores.

However, a ring bus also hits scalability problems. I wonder how much we're already seeing that, in Comet Lake's poor efficiency.

 

[bit_user]

Intel hasn't used a ring bus on its HEDT chips for years.

Since Broadwell-EP (LGA 2011v3), to be precise.

 

[bit_user]

I was merely pointing out to MadBones that 14nm isn't physically limited to 10 cores, plenty of space even on LGA1200 to push 20 if Intel really wanted to, the implication of which being that even more would be technically feasible (but not necessarily sensible) on LGA2066.

You should chill out, man.

He didn't reply to you, and it's clear from your post that you were addressing the hypothetical interconnect and area concerns @MasterMadBones raised.

Have a little faith in others' ability to read (in spite of occasional evidence to the contrary), and remember quite how low-stakes this all is.
: )

 

[TerryLaze]

it would be bad for gaming, which is pretty much Intel's last bastion so that would be a terrible idea for the desktop range.

Huh?!
Intel is still stronger in adobe, CAD, office, excel and basically in anything that people are spending big bucks on to get performance,Ryzen is faster in 3d rendering and x264 video transcoding (and 7zip if you choose a dictionary size as large as the cache) where people spend as little as possible for wholesale computing.

Also wasn't HEDT just a scheme to milk crazy people for the most amount of money?!Now intel is getting crazy amounts of money from the mainstream so there is no reason for HEDT anymore,although I can't see them completely stopping just because they won't release anything this year.

 

[bit_user]

Beyond a weird U-shaped layout, a single ring bus will always grow in just one dimension.

They could snake it around to connect an arbitrarily large number of cores, if they wanted to.

https://en.wikipedia.org/wiki/Hilbert_curve​

However, from a power & performance perspective, it just doesn't make sense past the point where you can do a 2xN arrangement.

 

[bit_user]

Also wasn't HEDT just a scheme to milk crazy people for the most amount of money?!

Uh... these companies are always trying to tap new market segments and maximize profits. So, I guess?

Now intel is getting crazy amounts of money from the mainstream so there is no reason for HEDT anymore,although I can't see them completely stopping just because they won't release anything this year.

The way I see it is like this: with up to 10 cores in the mainstream, the value proposition of HEDT is seriously impacted.

Comet Lake only added performance through increasing core counts and clock speeds, both of which hit TDP, hard. Clock speed increases don't scale well to higher core counts, and they can't really add more cores to HEDT. So, there's just little room for improvement over Cascade Lake (which they already refreshed).

They need a new uArch, and the big enabler for that is a new process node.