News Intel says defect density at 18A is 'healthy,' potential clients are lining up

[Admin]

Intel discloses defect density of 18A process technology for the first time, says clients are inclined to use it.

Intel says defect density at 18A is 'healthy,' potential clients are lining up : Read more

 

[Pierce2623]

Well maybe the foundry can save the design house from all their screw ups. The last thing we need is less competition in the market.

 

[vanadiel007]

We might never see these Intel CPU's with the way things are going.

 

[watzupken]

Wow, "lining up". I think we will see if there is a queue lining up indeed. Lining up to test and actual customers are not the same.

 

[ThomasKinsley]

I like Intel. I even like Gelsinger, but it's not a good sign when the CEO starts cheerleading future products to regain public confidence.

 

[Marlin1975]

Funny intel says this yet companies that would use it are saying...

"Broadcom reportedly disappointed with Intel 18A process technology — spokesperson confirms evaluation is still in process"

Intel needs to spend less on PR and more on manufacturing side.

 

[jackt]

we not even at 3nm yet ! amd cpu are 4nm.....

 

[ToBeGood]

One thing that I really don't understand is that if that is really the case, why Intel can't product, accept the loss and move on? The loss (increase of) of 10%-20% COGS for the next 6 months and 10%-15% (for next 12 months) is totally acceptable (or Not?)?

Even there is no density improvement (with BSPD the improvement alone is 6%), with Meteor Lake Compute Tile i.e. 8.9mm * 8.3mm

https://en.wikipedia.org/wiki/Meteor_Lake

Using the calculator

Die Yield Calculator - iSine

DIE YIELD CALCULATOR Use this online calculator to figure out die yield using Murphy’s model. You’ll need to know the die size, wafer diameter, and defect density. iSine is your complete resource for ASIC design – from concept to manufacturing and testing. We have expertise in system...

isine.com

The Yield of D0 < 0.4 (as per Intel statement) for 18A then the Yield is 75%, from TSMC or other Foundry experience, each 3 months there is a 0.1 improvement on average, and if the pattern is follow through, I don't understand why Intel can't produce, that just equal to 10-20% GP disadvantage.

One thing I don't really understand is that Intel 20A/18A is at the level of TSMC A16, for the past couple of years, TSMC increase on average 30% for each generation, from now the N3E to A16, TSMC around 1.7 times (i.e. 1.3 * 1.3 (2 generation est i.e. N2 -> A16), even cost of an N3E wafer is 50% (cost of 20A is 2 times) of 20A, the performance gain of 2 generations, meant that 20A is around 30% more then TSMC with a 2 years advantage, a price that Intel should paid.

Because the PR statement is under Investor Relation site (IR), and the current news is that the shareholder wants to have a class action towards Intel for the Foundry Business, I have no reason that Intel PR / IR will release scientific number in terms of D0 while that is remotely false, since that is already on a possible legal proceedings, any false claim can lead to jail terms.

In fact, the most worry bit is like intel trying to milk the user again, they know that Zen 5 is in trouble (from Microsoft), they know that Lunar Lake is totally on par with Zen 5, they try not to release all the performance possible and let competition and users suffer.