Someone Somewhere :
There is already a USB Power Delivery spec that does 100W; I think it's at around 20V. They intend it to be used for charging laptops etc.
Take a look at TOSLINK, and imagine that getting a few thousand plug/unplug cycles. It'll be a pain. You also end up with very thick cables too.
PCIe bridge chips still use a ridiculous amount of power though, don't they?
The 100W spec is in-the-works but it remains to be seen whether or not they will actually manage to make it work with existing cables and connectors as per their original intent. Most USB cables have #26 gauge power wires which should NOT be used for more than 2A: #26 wire has 0.133ohm/m resistance (x2 for power+gnd) so a 2m USB cable has ~0.52 ohm and at 5A, that would be ~13W wiring power loss on the 100W spec; enough to make the cable uncomfortably hot and likely unacceptable for public safety reasons. Also, since the 10W (2A@5V) spec is power/charge-only due to interference, I'm guessing the 100W spec would be power/charge-only as well, which means useless for powering actual medium/high-power PC/laptop peripherals.
The nice thing about POF is that it should still work even if the alignment is sub-optimal and connectors have gotten a little roughed up... you can cut the connector off, jam the raw plastic fiber in the connector and it will probably still work with some paper wrapped around it to help center it a bit and prevent it from falling out. With SMF or even MMF, you are out of luck if alignment is off by more than a few microns or degrees. Size-wise, TOSLINK's thickness isn't so bad and adding power would not make the cable substantially larger.
Normal PCIe bridges do not use "ridiculous amounts of power" what does use ridiculous amounts of power is ridiculously LARGE PCIe bridges like those 48-80 lanes PLX chips on motherboards with 4 full-speed x16 PCIe slots and extra IO chips. The main power hogs in those chips are the analog bits for each lane and PLLs for each lane group. USB3 is also somewhat of a power hog on the analog side of things.
As for PCIe over USB3, I think they should simply pick a page off SAS' book: use the same connector but auto-negotiate the protocol. If the host USB controller supports external PCIe and the USB device supports external PCIe too, the link should simply switch to hot-swap PCIe - avoid layering protocol whenever possible... if you put PCIe over USB, the protocol stack ends up being device driver, PCIe (virtual), USB (encapsulation), PCIe (sending to USB host controller), USB (actual wire), PCIe (target hardware), USB (target driver), PCIe (extracted emulated PCIe frame), device while with native support, it would be straight PCIe from CPU to device so you save four software conversions and two hardware ones... saves processing power, electrical power, memory and latency.
Gotta love when engineers choose unnecessary complications.