Intel Xeon E5-2600 v4 Broadwell-EP Review

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turkey3_scratch

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In most server applications it doesn't matter as much as multithreaded performance. If you need single-core strength, getting a consumer chip is actually better, but you probably aren't running a server if single-threaded is your focus.
 

PaulyAlcorn

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Wasn't there supposed to be a 4-core 5.0 GHz SKU? Single-thread performance still matters, in many cases.
I read the rumors on that as well, but nothing official has surfaced as of yet to my knowledge.
 

bit_user

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Try telling that to high-frequency traders. I'm sure they want the reliability features of Xeons (ECC, for example), but the highest clock speed available.

And the fact that Intel even released low-core high-clock SKUs is an acknowledgement of this continuing need. Clock just not as high as I'd read. With the other specs basically matching the Haswell version, the only difference is ~5% IPC improvement. Seems pretty poor improvement, for a die-shrink.
 

firefoxx04

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Would nice to have a quad core xeon that turbos at 4.4ghz just like the 4790k. I had to go with a 4690k when building an autocad system because it only uses one core and needs that core to be fast... this means i have to sacrifice ecc support.
 

bit_user

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On wccftech (not the most reliable source, I know), they claimed:

Model: Intel Xeon E5-2602 V4
Cores/threads: 4/8
Base clock: 5.1 GHz
Turbo clock: TBD
L3 Cache: 5 MB
TDP: 165W

Given what we know about 2.5 MB/core of L3 Cache, the 5 MB figure sounds suspicious. It's conceivable they could disable some to hit the target TDP, I guess.
 


I'm not saying the 5Ghz rumor is true but Intel has always known which chips can hit higher clocks during certification if the chip is a top end or low end chip cores disabled etc. I'm sure they could cherry pick a few to sell for $$$ if they wanted. Now are they I have no real idea.
 

bit_user

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Well, I was surprised, too.

There are obviously things you can do in chip design that allow one to reach different timing targets. And I was hoping they might've refined their 14 nm process, since the time the first Broadwells launched. So, I thought, with more TDP headroom afforded by this socket (roughly double what Skylake has to work with), maybe they could do it.

I thought maybe Intel was addressing some pent-up demand for high clockspeed applications. That said, it seemed particularly odd in Broadwell, given that it generally seems oriented towards lower clockspeed / lower power applications.

But maybe it was a typo, or even a blatant lie, in order to track down leakers.
 

alidan

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We cant get skylake to consistently hit 5ghz... why would a xeon chip suddenly hit 5ghz?
proper binning and sold specifically as that because of what it hits, this could double/triple the value of the chip at least compared to other lower binned versions.
 
Wasn't there supposed to be a 4-core 5.0 GHz SKU? Single-thread performance still matters, in many cases.
A really high clock on a server platform seems like an overclocker's dream to me. Stability and performance. Not to mention that server processors use solder instead of that cheap paste Intel uses in their consumer processors.
 

RedJaron

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Doesn't sound right to me. A server chip binned that high would be ridiculously expensive, more than even the 5960X. I can't see then selling more than a couple hundred to the richest and most eccentric computer enthusiasts.
 

bit_user

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FWIW, IBM introduced Power6 processors in 2007 & 2009 that were clocked up to 5 GHz. No doubt, they cost an arm and a couple legs.
 

Waldek

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Slightly off the topic, but... I was curious about the data centers' power consumption statistics. The article says 416.2 TWh per year. This is true. What the article says incorrectly, however, is that it would be more than 182 countries (of 192). The correct example would be that this gives the datacenters of the world 11th place in the power consumption ranking in the world. For example, the UK alone consumes 320 TWh (and is currently number 11 worldwide). The datacenters consume currently ca. 5% of the world's power usage...
 

PaulyAlcorn

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Slightly off the topic, but... I was curious about the data centers' power consumption statistics. The article says 416.2 TWh per year. This is true. What the article says incorrectly, however, is that it would be more than 182 countries (of 192). The correct example would be that this gives the datacenters of the world 11th place in the power consumption ranking in the world. For example, the UK alone consumes 320 TWh (and is currently number 11 worldwide). The datacenters consume currently ca. 5% of the world's power usage...
The article does not state that it is more than the *combined* total of 182 countries, merely that it consumes more power than each of them compared individually. You are right,mentioning that it would place 11th in the world is probably a better way of stating the statistic.
 

bit_user

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Sure, but there's a difference between binning chips designed to run at a lower clock vs. actually designing a chip to hit higher clock speeds. There's no reason Intel can't make chips that clock higher, but they don't choose to because they think there's not sufficient market demand for something which burns so much power. AMD tried this with 225 W TDP Bulldozers, a few years back.

I remember reading that the Pentium 4 was originally designed to scale up to 10 GHz, by the end of its production. Of course, back then, the only way they could hit those speeds was to use really long pipelines composed of very simple stages. Then, when they discovered that leakage of newer process nodes was higher than anticipated, they were left with a very inefficient architecture that was stuck below the clock speeds that would've made it competitive.

These days, I think Intel could do it without such a drastic architectural tradeoff. But it still comes down to a power vs. clock, no matter what.
 

utroz

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Those IBM chips had a really long pipeline to allow clock speeds that high as well as an SOI process node basically built from the ground up for them. I wonder what version of 14nm Intel is using for Broadwell-E/EP/EX as I know they had one version they used for the Broadwell-U,Y,H,DT(C) and when they moved to Skylake they used an updated version of 14nm. Is it possible that Broadwell_E/EP/EX are using the updated 14nm process?
 
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