Itels New 2 Billion Transistor CPU with 30MB of cache !

[jimmysmitty]

Have a problem with humour? Maybe just a bad day?
FYI Itanium has been the laughing stock of the server market for longer than I can remember.
It has been called Itanic since 2K or earlier.
Just consider yourself lucky. Intel had planned to shift everyone to IA64 itanic chips, up to the point where AMD brought out x86-64.
It may still happen.
The price range for Itanics is $800 to $3000.

So in a way AMD killed some innovation for all users. Thats nice to know. x86 is old and IA64 has a lot of features with a lot of promise.

But for now we shall remain stuck with x86-64. Unless AMD suddenly decides to go with a IA64 type architecture.

 

[Ycon]

Ah yes, Itanium.
They are also known as "the money pit", and Itanic.
Intel has spent about $100billion on that puppy over the last ten years.
Since it first went on sale about 6 years ago, they have sold thousands.
It is intended as an HPC server chip. Problem is, it's more efficient to go with multiple clusters, with IBM, opteron, and even xeon chips.
I'm sure that AMD will be happy to see Intel waste more $ and research on it.

Why in gods name are you back?

 

[Reynod]

Just how does "The Barcelona launch was far more botched (Launched last September... servers still MIA!) than any Itanium launch" fit reality Mandrake??

Barcelona has already outsold Itanium ... with the bugged ones they shifted first.

Barcelona high end servers are rapidly taking back market share at the 4 and 8 socket end ... Intel has no competition because their current FSB based products just don't scale as well.

Till nehalem.


Itanium is the laughing stock of the server industry ... an absolute joke.

They can stick 60Mb of cache on it and nobody will care.

Rodney ... I am shocked ... did you have to spell check that and get some help??

 

[wingless]

So in a way AMD killed some innovation for all users. Thats nice to know. x86 is old and IA64 has a lot of features with a lot of promise.

But for now we shall remain stuck with x86-64. Unless AMD suddenly decides to go with a IA64 type architecture.

You're very wrong about that. Read up on why IA64 was dumped by the industry and x86-64 was welcomed and adopted before you make a statement like that.

 

[jimmysmitty]

You're very wrong about that. Read up on why IA64 was dumped by the industry and x86-64 was welcomed and adopted before you make a statement like that.

Or you could take it as a joke like it was meant to be.

I know why IA64 was not accepted and x86-64 was. IA64 had no direct backwards support for 32bit and x86-64 was basically 32bit with 64bit extensions.

Although IA64 was and still is a more efficient architecture from what I have read, it would take too much to fully drop 32bit support and switch everyone to only 64bit support.

Man people here need to get a sense of humor.

 

[EXT64]

Well, Barcelona is out now. You can grab one off Newegg if you'd like.

 

[homerdog]

Well, Barcelona is out now. You can grab one off Newegg if you'd like.

I'll pass

 

[jimmysmitty]

Well, Barcelona is out now. You can grab one off Newegg if you'd like.

IDK. I kinda prefer a Double Whopper w/cheese to a quarter pounder without cheese...

 

[Gh0stDrag0n]

mmmmm.....cheese

 

[endyen]

So in a way AMD killed some innovation for all users. Thats nice to know. x86 is old and IA64 has a lot of features with a lot of promise.

But for now we shall remain stuck with x86-64. Unless AMD suddenly decides to go with a IA64 type architecture.

In case you didn't know, Itanic is what's called a VLIW, or very large instruction word chip.
The problem with this type of architecture, is the compiling requirements. A bad compile can cost big time.
It is also not very fault tolerent. A small misque can have severe consequences. While most OSes were ported to IA64, performance costs were problematic.
It doesn't help that it's huge size/cost also makes reasonable speeds almost impossible.

 

[endyen]

Why in gods name are you back?

Back?
When you say anything that is even remotely inteligent, I will listen (and be very amazed). Until then, I will think of you as an idiot troll, and not really give a rats rectum what you say.

 

[Reynod]

rats rectum ... LOL

 

[chunkymonster]

From Wikipedia...

The chip will have 4 processor cores per die and 30MB of cache[3]; it may only be able to run at full rated clock with some cores deactivated. In this way it can be configured for highest multithreaded performance or highest single thread performance, while staying within its thermal limits.

So wait a minute...it may only be able to run at rated speeds if one or more of the cores is deactivated? Is this Intel's version of tri-core?

Itanium is/was great in theory but never really delivered any benefits in the real world. I'm surprised they even keep the project alive.


jimmysmitty wrote:

But as I said I can't wait to see it in action just to see AMD's response.

Don't hold your breath. I doubt AMD will even respond to it.

 

[jimmysmitty]

From Wikipedia...



So wait a minute...it may only be able to run at rated speeds if one or more of the cores is deactivated? Is this Intel's version of tri-core?

Itanium is/was great in theory but never really delivered any benefits in the real world. I'm surprised they even keep the project alive.


jimmysmitty wrote:

Don't hold your breath. I doubt AMD will even respond to it.

One problem here. Its Wiki. Can't fully trust it as a reliable source. From what I gather it will do the same thing that was meant to be in Nehalem. Where, for single threaded apps, it will downclock the cores not being used and OC like crazy the core that is processing the thread. This will result in two things. Faster single threaded performance and it can easily stay in the same thermal envelope as when it had all cores at the same clock.