News Kioxia and SanDisk start shipping BiCS9 3D NAND samples — hybrid design combining 112-layer BiCS5 with modern CBA and DDR6.0 interface for higher p...

[Admin]

Kioxia has started shipping samples of its ninth‑generation BiCS FLASH 512 Gb TLC chips built with CBA tech — pairing legacy memory cell layers with modern CMOS controllers. The result: improved performance, efficiency, and lower cost, while paving way for high‑capacity BiCS 10 launches.

Kioxia and SanDisk start shipping BiCS9 3D NAND samples — hybrid design combining 112-layer BiCS5 with modern CBA and DDR6.0 interface for higher p... : Read more

 

[usertests]

Confusing but interesting.

This innovation allows Kioxia to mix and match mature cell structures—such as a 112-layer BiCS5 or a 218-layer BiCS8—with a modern I/O interface.

So higher speed NAND with denser NAND?

The result is a chip capable of delivering Toggle DDR 6.0 speeds of up to 3.6 Gb/s, with peak speeds reaching 4.8 Gb/s under controlled testing conditions.

I take it that is unrelated to DDR6 DRAM?

 

[JRStern]

Confusing but interesting.
...
I take it that is unrelated to DDR6 DRAM?

I dunno either, I could guess but hey.
Maybe it has to do with new memory architecture I've seen mentioned, no more disk interface, no more PCI interface, it can write big blocks faster to DRAM, this makes the AI guys happy, possibly an alternative to HBM.

 

[thestryker]

I take it that is unrelated to DDR6 DRAM?

Correct it's an interface standard and "Toggle" is the important word here (the headline should probably be changed). I'd not seen the terminology before either and went searching and this was the first thing I saw which just explained it:

NAND Flash 101: Flash Device Interfaces - Phison Blog

The development of NAND flash technology has been steadily moving forward based on a multitude of inputs from the industry. Collaboration between host device

phisonblog.com