News Leaked Intel Six Core CPU Reveals a New Architecture Coming Soon

[Admin]

This leak raises many questions about nodes and architectures, but gives us few answers.

Leaked Intel Six Core CPU Reveals a New Architecture Coming Soon : Read more

 

[NightHawkRMX]

Hmm. Only time will tell what happens.

I think Intel would be wise to increase Cache per core. AMD has done this with zen+ to Zen2 and i suppose it is part of the reason Zen 2 is suck a great architecture.

 

[justin.m.beauvais]

Considering how incomprehensible Intel has been lately it really could be anything... but 6 cores with HT leads me to believe mainstream grade hardware, so mobile, NUC, or desktop.

Things are going to be pretty interesting for a while. With AMD firing on all cylinders and Intel finally waking up from the Sandy Bridge slumber it is going to be a great next few years for consumers.

 

[valeman2012]

Hmm. Only time will tell what happens.

I think Intel would be wise to increase Cache per core. AMD has done this with zen+ to Zen2 and i suppose it is part of the reason Zen 2 is suck a great architecture.

Considering how incomprehensible Intel has been lately it really could be anything... but 6 cores with HT leads me to believe mainstream grade hardware, so mobile, NUC, or desktop.

Things are going to be pretty interesting for a while. With AMD firing on all cylinders and Intel finally waking up from the Sandy Bridge slumber it is going to be a great next few years for consumers.

Its still good Intel is saving Moorw Law by slowing while able to keep the performance on the top. Especially in gaming performance.

 

[NightHawkRMX]

Its still good Intel is saving Moorw Law by slowing while able to keep the performance on the top. Especially in gaming performance.

Im not sure if im drunk or if your drunk.

That makes absolutely no sense.

 

[justin.m.beauvais]

Im not sure if im drunk or if your drunk.

That makes absolutely no sense.

I thought the exact same thing.

Its still good Intel is saving Moorw Law by slowing while able to keep the performance on the top. Especially in gaming performance.

Moore's Law is about the speed of increasing the number of transistors on an IC over time. He assumed transistor count would double every 18 months or so. So... yeah. You didn't make much sense there.

As for keeping performance on top, they are failing at that right now. All they really have at this point is gaming. Mostly just because Intel maintains a clock speed advantage, because of how good they have gotten at 14nm production, but they are falling behind sorely in programs that can use more cores. On top of that most games don't take advantage of all the cores modern CPUs have to offer so there is really only that keeping Intel on top as fewer faster cores is what they are doing... but they are losing even that advantage.

 

[bit_user]

This is so obviously Ice Lake Server. For those who aren't aware, Intel offers low-core-count server CPUs for scenarios where people mostly care about I/O or about getting the highest clock speed out of a small number of cores. Just check out the range of Cascade Lake CPUs available:

https://ark.intel.com/content/www/u...eneration-intel-xeon-scalable-processors.html

All the way down to 4 cores.

Anyway, the critical clue that it's a server CPU (besides the huge L2 cache) is the dual-CPU configuration. They don't support that on any CPUs besides the server range (which sometimes do find their way into "workstation"-branded chassis, it should b enoted).

In my opinion, the only reason for all the speculation is just to milk a longer article out of this one tiny leak.

 

[rluker5]

Hmm. Only time will tell what happens.

I think Intel would be wise to increase Cache per core. AMD has done this with zen+ to Zen2 and i suppose it is part of the reason Zen 2 is suck a great architecture.

Intel also increased cache going from Apollo Lake to Gemini Lake and the results were quite good there as well.

 

[thGe17]

This is so obviously Ice Lake Server ...

Right now there's nothing obvious about it. This could be anything from a more modified Cooper Lake (than anticipated) to Ice Lake to an early Sapphire Rapids sample.

The only conclusion for a different architecture is the larger L2, but they could keep the current arch/core-design and only adjust the caches (like they're currently doing with Tiger Lake/Willow Cove).
Also the smaller L3 is no certain hint for a low-density 14nm process. Maybe the larger L2 allows for a smaller L3 as a reasonable trade off ... who knows and it is still a 10nm process? A lot of speculation ... at least it seems to be a Xeon die, because I do not remember dual socket support for anything else ... or maybe SiSoft identification was wrong and it was no dual-socket, but a MCM-design instead ... just wait and see ...

 

[bit_user]

Right now there's nothing obvious about it. This could be anything from a more modified Cooper Lake (than anticipated) to Ice Lake to an early Sapphire Rapids sample.

According to Wikichip, Cooper Lake still has 1 MB/core of L2:

https://en.wikichip.org/wiki/intel/microarchitectures/cooper_lake

Also, I wouldn't think they'd increase it, due to the fact that it's still made on 14 nm, but I can't rule it out.

And no freaking way would it be Sapphire Rapids, this far out. That's insane. If they would already have Sapphire Rapids samples that can boot and run benchmarks, then I doubt they'd even bother with Cooper Lake.

The thing is that the article didn't even mention Cooper Lake. Instead, just rehashing a bunch of stuff that clearly wasn't relevant, when you consider that none of the desktop or workstation chips support dual-CPU configurations.

at least it seems to be a Xeon die, because I do not remember dual socket support for anything else

That was my main point. No, there's absolutely no multi-CPU support outside of their server (meaning LGA 3647, 4189, or 4677) sockets. LGA 2066 can't do it, and certainly not their desktop sockets.

or maybe SiSoft identification was wrong and it was no dual-socket, but a MCM-design instead ... just wait and see ...

2x6 would be weird, but I guess not an implausible move for a desktop-class CPU.

 

[bit_user]

Intel also increased cache going from Apollo Lake to Gemini Lake and the results were quite good there as well.

I think that was mostly because cheap OEMs were using them in single-channel memory configurations. When you're bandwidth-starved is when more cache has the biggest impact. And don't forget - that single channel was also having to service the iGPU's needs.

Gemini Lake also added a 4th execution port, so the performance improvement wasn't just due to more cache.

 

[DavidC1]

Right now there's nothing obvious about it. This could be anything from a more modified Cooper Lake (than anticipated) to Ice Lake to an early Sapphire Rapids sample.

I agree, this is obviously Icelake server.

The platform is on the SuperMicro X12DAi-N SMC X12 board.

If you investigate a little more you'll see other CPUs with the same cache configuration but with 14 cores on the SuperMicro X12DPT-B and SuperMicro X12DPi-N(T) SMC X11 platform.

You can also see Cascade Lake-SP CPU using the SuperMicro X11DAi-N SMC X11 platform. If you search for the motherboard, it does indeed support Cascade Lake. So the X12 is the next generation platform.

 

[joeblowsmynose]

This is so obviously Ice Lake Server. For those who aren't aware, Intel offers low-core-count server CPUs for scenarios where people mostly care about I/O or about getting the highest clock speed out of a small number of cores. Just check out the range of Cascade Lake CPUs available:

https://ark.intel.com/content/www/u...eneration-intel-xeon-scalable-processors.html

All the way down to 4 cores.

Anyway, the critical clue that it's a server CPU (besides the huge L2 cache) is the dual-CPU configuration. They don't support that on any CPUs besides the server range (which sometimes do find their way into "workstation"-branded chassis, it should b enoted).

In my opinion, the only reason for all the speculation is just to milk a longer article out of this one tiny leak.

Exactly my immediate thoughts.

 

[joeblowsmynose]

...
On top of that most games don't take advantage of all the cores modern CPUs have to offer so there is really only that keeping Intel on top as fewer faster cores is what they are doing... but they are losing even that advantage.

A recent Techspot article showed that with tuning RAM 3950x is within 4% (average of 18 games I think) of 9900KS in gaming FPS ... and that is with both CPUs with the same memory tuning - not just the Ryzen - showing that Ryzen gains significantly more with RAM tuning, than Intel.

... and that was at 1080p with a 2080ti, inducing CPU bottleneck. In any real gaming scenario there is no difference whatsoever between the two, and certainly when RAM is tuned. 4% in a situation that no one actually games in is completely insignificant.

So to keep saying that "Intel is better in gaming" is more just a technicality than any reality.

 

[donner]

This is so obviously Ice Lake Server. For those who aren't aware, Intel offers low-core-count server CPUs for scenarios where people mostly care about I/O or about getting the highest clock speed out of a small number of cores.

Agreed. More specifically, these are for running SQL Server and Oracle.

 

[StewartHH]

This is so obviously Ice Lake Server. For those who aren't aware, Intel offers low-core-count server CPUs for scenarios where people mostly care about I/O or about getting the highest clock speed out of a small number of cores. Just check out the range of Cascade Lake CPUs available:

https://ark.intel.com/content/www/u...eneration-intel-xeon-scalable-processors.html

All the way down to 4 cores.

Anyway, the critical clue that it's a server CPU (besides the huge L2 cache) is the dual-CPU configuration. They don't support that on any CPUs besides the server range (which sometimes do find their way into "workstation"-branded chassis, it should b enoted).

In my opinion, the only reason for all the speculation is just to milk a longer article out of this one tiny leak.

Yes I would say it is definitely a server/workstation CPU - it simple look at the type of motherboard it - hopefully Intel has surprise us with some 10nm Xeons

Supermicro X11DAi-N Workstation and Server Motherboard Review

The Supermicro X11DAi-N is a dual processor workstation and server motherboard that supports dual Intel Xeon Scalable CPUs and plenty of storage and GPUs

www.servethehome.com

 

[thGe17]

According to Wikichip, Cooper Lake still has 1 MB/core of L2 ...

A lot of speculation, yes. Most likely this is an early sample of Sapphire Rapids SP, because its already too late in the dev process for being Ice Lake SP (its production should already start in 2Q20).
And because its an engineering sample, there's nothing weired about 2x6. Intel already has 4-Core Xeons scaling up to 8 socket systems in the Scaleable lineup and for an engineering sample you can use anything. Maybe they have used two 10-core-dies and disabled 4 dies for testing, who knows.

Sapphire Rapids SP will (most likely) use Willow Cove microarchitecture and 10nm++(+) process. If they want to achive a high core count, maybe wafer size is still an issue and it may be reasonable to reduce L3, e. g. if they are going to produce something like a 20- or 30-core design (and probably use MCM to deliver higher core counts). Still speculation, but I would guess, that they are not going to switch to a full "chiplet/core separation" like AMD any time soon, because this design also has its drawbacks. So, it is most likely not Rocket Lake (in any process node).

 

[bit_user]

A lot of speculation, yes. Most likely this is an early sample of Sapphire Rapids SP, because its already too late in the dev process for being Ice Lake SP (its production should already start in 2Q20).

Huh? That doesn't make any sense. Why is this "too late" to be a leaked benchmark of an unreleased CPU? Even if you were right about Ice Lake SP's launch date (see below), any production-quality CPUs should still be in relatively short supply, if they're even available to partners more than 1 quarter out.

Also, see above points about the motherboard used. I think there would be a missing generation, not to mention that it would be ridiculously early for Sapphire Rapids SP.

Finally, Intel is now saying that Ice Lake SP will launch in 2H 2020.

Intel Refutes Reports of Further Roadmap Delays

What, me worry?

www.tomshardware.com

there's nothing weired about 2x6.

Yeah, that was my original point.

 

[thGe17]

2Q20 will be Ice Lake SP's start of mass production, then availability in 3Q20.

Intel showed Ice Lake SP engineering sample-chips already many months ago on conferences, therefore I guess "too late". Sunny Cove has been first introduced (to the market) with Ice Lake U and the new 10nm+ process (maybe also as some kind of test vehicle). The new microarchitecture will now also power the next SP gen (excluding Cooper Lake as some kind of transistion model). B.Swan called Ice Lake SP during the earnings call a "storage server cpu", which might reflect its limited competitiveness compared with AMDs Rome (and Milan).

And again I expect the next microarchitecture Willow Cove to be introduced with the mobile Tiger Lake U in 10nm++ around mid 2020. The new arch will then be the basis for Sapphire Rapids SP in 10nm+++ early 2021.

"ridiculously early", why? Production may be start at the End of 2020, therefore its only 12 month, to prepare, validate, test and adjust the new CPU arch and to finalize a completely new (and important) platform (DDR5, PCIe 5, CXL, Xe Link, ...).
And for the board, the cpu/s might be only test packages to evaluate only these in a very early stage, therefore they used an available platform.
Of cource I could be wrong, but I do not expect such a massive overhaul for Ice Lake SP, therefore my guess: its Sapphire Rapids SP.


*) Additionally it can be expected that Ice Lake SP cores have been slightly modified (compared to the current mobile design) for server workloads, unless Intel takes the "storage server cpu" literally, therefore I would expect e.g. two AVX-512-FMA-units and the bfloat16 subset.

 

[bit_user]

2Q20 will be Ice Lake SP's start of mass production, then availability in 3Q20.

Not according to the sources reported here: https://www.tomshardware.com/news/intel-refutes-reports-of-further-roadmap-delays

If you've got a better source, I'd like to know what it is.

Intel showed Ice Lake SP engineering sample-chips already many months ago on conferences, therefore I guess "too late".

It's never "too late" to run benchmarks, especially on a partner board. You know, there's typically more than one generation of engineering samples, and it takes time for partners to get their boards in shape. Finally, there's the issue of software support, which has to be there for actually booting an OS and making it through a run of a benchmark suite.

Finally, you have no idea who ran the benchmarks. For all we know, it could be an employee who took the samples home because they were no longer needed at the office, or maybe even resold them, as sometimes happens.

It's literally never "too late" to see these kinds of benchmarks emerge, but it's sure as heck too early for Sapphire Rapids.

"ridiculously early", why? Production may be start at the End of 2020, therefore its only 12 month, to prepare, validate, test and adjust the new CPU arch and to finalize a completely new (and important) platform (DDR5, PCIe 5, CXL, Xe Link, ...).

Exactly. That's a lot of new tech that will require lab time to troubleshoot and debug, before they can even get to the point of trying to boot a normal OS and get the drivers debugged to the point where there's any hope of making it through a benchmarking run. And right now, a lot of the folks who would be involved in the later stages of that process probably still have their hands full with Ice Lake SP. So, it's just not plausible that Sapphire Rapids is nearly that far along.

And for the board, the cpu/s might be only test packages to evaluate only these in a very early stage, therefore they used an available platform.

No, that makes no sense.

Of cource I could be wrong, but I do not expect such a massive overhaul for Ice Lake SP, therefore my guess: its Sapphire Rapids SP.

Hmmm... new socket, PCIe 4.0, and new chipset are not exactly small changes. It's not like Cascade Lake, where you can just drop it in an existing socket on an existing board and go.

*) Additionally it can be expected that Ice Lake SP cores have been slightly modified (compared to the current mobile design) for server workloads, unless Intel takes the "storage server cpu" literally, therefore I would expect e.g. two AVX-512-FMA-units and the bfloat16 subset.

We know it won't have BFloat16, because the uArch predates Intel's commitment to that format. Cooper Lake will have it, though.

Anyway, the point about it being a storage server processor only strengthens the argument that it's Ice Lake SP. Storage servers have lots of I/O (such as PCIe 4.0), but are relatively weak on compute. Cooper Lake will still be on PCIe 3.0, and being 14 nm, will undoubtedly feature higher clock speeds.