juin

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In the new software manual there information on madison 9M.

Clock speed 1.7GHZ 9M of L3 14\15 cycle latency 2 way per MB.It also mention that there will be version at 533 FSB and 677 FSB.

According to the register inquirer and many others source.Fanwood will have 533 FSB i guess on the same E8870 and ZX1.Madison 9M will have 667 FSB on 2 generation of chipset.Montecito will have also 3 FSB speed 400 533 667.


It me or 533 and 677 should have been skip and make place for 800 mghz and be able to use the fsb for the next 3 year with DDR1 DDR2 FBDIMM.


i need to change useur name.
 

P4Man

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Not at all. there is nothing simple or cheap about implementing a >400 MT 128 bit frontside bus that has to support up to 4 cpu's.

Saying they "just" have to implement a 800 MHz FSB is like saying they just ought to release a 2 GHz part..

= The views stated herein are my personal views, and not necessarily the views of my wife. =
 

Mephistopheles

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Um, an 800Mhz-128bit wide bus is 12.8GB/s. That's a hefty goal and is probably hard to do indeed.

They should go with point-to-point busses. Sharing the bus is just a simplistic solution and point-to-point busses are simply better in many ways...

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>
 

juin

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Intel have allready say they will move to point to point.

The good point is they drop in compatible with Itanium of the first name.There will be 3 platform in the same time.ZX1 allready use PC2100 and is ready from day 1 to 533 mghz FSB so it might just be a upgrade path for HP customer.

While 667 FSB will be the new arbitary bus for Madison 9M and montecito and LV version.Mike fister have promise 3 time the bandwith for montecito so unless they move to 1200 MGHZ FSB the only way is to have point to point bus.In the same time Xeon MP will use the 667 mghz FSB so there a good chance that high-end xeon chipset is itanium chipset and the same point to point bus.

i need to change useur name.
 

Mephistopheles

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A 667Mhz point-to-point bus for Itanium would be nice. It would transfer 10.6GB/s.... It might increase Itanium's scalability a lot. A four-way Itanium with each processor communicating with the other at 10.6GB/s could have aggregate system bandwidth of like 30~40GB/s....

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>