News Micron unveils DDR5-9200 memory: 1γ process technology with EUV

I find it interesting they are boasting about the EUV process with slides, rather than the high-k material that made the capacitor size shrink possible.

Is 1γ a 8nm to 10nm node size?
 
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I wonder if this will mean Micron DDR5 IC will be viable for high performance kits finally. I don't think I'd move back to lower capacity modules, but it would be nice if SK Hynix had some actual competition. In theory that might knock down the prices on the higher performance kits.
Is 1γ a 8nm to 10nm node size?
Yeah it's in that general area. Due to the trouble with shrinking memory all of the manufacturers have obfuscated their process for years now. I think SK Hynix was the first of the three to use EUV which may explain their dominance in the DDR5 era.
 
First of all, I'm typing this from a cell phone so sorry for any sloppiness.

Typo in the main article: I assume "March 25th" is meant to be "February 25th"

I find it interesting they are boasting about the EUV process with slides, rather than the high-k material that made the capacitor size shrink possible.

Is 1γ a 8nm to 10nm node size?

For context, cell sizes are measured with 6F^2. IIRC, the previous feature size (F) for 1-beta was slightly over 13nm (as in, something like 13.1nm) which put it behind Samsung and SK Hynix which were slightly below 13nm (something like 12.9nm). Tokyo Electron's generic roadmap for investors put "12-11nm" as the feature size of 1-c/1-gamma, so it's likely in that range.