"... The -5820K's frequency is 25% slower and it has 12 of its PCIe 3.0 lanes disabled. ..."
This notion of selling crippled parts is extremely annoying. It would bother me less if the CPU was designed from the ground-up to be a 28-lane part, hence less transistors, less heat & power usage, more oc headroom, etc. But selling something that's deliberately hobbled in this way is a step backwards IMO. It also makes the 4820K a rather peculiar chip, since that does have 40 lanes. There's clearly no reason for the 5820K to be restricted, it's just a lockout, most likely done with dies that have faults in the relevant silicon. Tell ya what, let's market cars with one broken wheel as 3-wheelers, because that's a good idea.
I'll be benching a 4820K soon with some 980s, anyone care to make predictions on how it'll compare to a 5820K for typical results? (3DMark11/13, etc.)
IMO the entire 5K lineup is wrong, and it's only the way it is because there's no competition. The 5820K should be a 6-core with full lanes (40, whatever), the 5930K should be 8 core with the same no. of lanes, the 5960X should be 8 or 10 core at a higher clock with a lot more lanes (64, 80, etc.), enough for full 4-way x16 with plenty to spare for M.2, priced accordingly high to make it attractive to those happy to pay oodles for something really groundbreaking, rather than the lame 3GHz lapdog we have atm which IMO is not remotely the woohaa 8-core I was hoping for.
Remember, the 3930K was an 8-core chip with 2 cores disabled, so we know Intel can easily produce affordable 8-core dies. The XEON line shows there are no technical hurdles to this (the specs of the 2687W v3 and 2697 v3 suggest the 5960X could easily have been made to run at 3.6+ base clock, they use the same lithography). Instead, it's now 2 generations past when we could have had a mid-range consumer 8-core, but we don't because Intel still doesn't need to make one.
I hope AMD can get back into the game if for no other reason than to force Intel to stop messing around and finally push the tech forward in the manner we all know it's perfectly capable of doing. Enough with the tech crippling already!
PS. Likewise, I'm tired of the mainstream chipset still only havng 16 lanes (ie. Z97 atm), resulting in all sorts of faffing around with SLI/CF tradeoffs vs. M.2/etc. usage. It's the mainstream chipset which needs to be more like 28 lanes by now, not the bottom of the high end.