Nehalem EX vs. Magny Cours

[r_manic]

Seriously, AMD has a CPU code-named Magny Cours? I was suddenly thinking of the French Grand Prix :lol:

The Nehalem EX has higher raw memory bandwidth, with four serial memory channels per socket, each going to a buffer chip that supports two DDR3-1066 memory channels. So, a total of eight DDR3-1066 channels per socket, but with the buffer chip latency overhead to add. Magny Cours has a total of four direct DDR3-1333 memory channels spread across two dies, with no buffers in between adding latency overhead. However, keep in mind that it's not really four channels, but "two plus two" channels. If a thread residing on one die wants to access memory across all four channels, it can access two channels locally on the same CPU die pretty fast. But it needs to hop over slower HyperTransport to get the memory content on the other two channels, so there will be a slowdown in accessing them, if not extra wait time because of other threads on that other die also trying to access the memory.

More, including a table, here.

 

[BadTrip]

If you didnt know that why are you a mod?

 

[jimmysmitty]

As I said before, Nehalem EX is what magny Cours should really worry about.

 

[fazers_on_stun]

Too bad Jenny got herself banned. Again. As many of us have tried to tell her & the other AMD fanbois, MC is too big, too slow and needs an arch update.

I thought this conclusion was interesting:

On the other hand, as hinted before, Magny Cours and Lisbon Opterons may end up cornered between the high core speed Westmere EP and the many core and thread Nehalem EX, each with greater focus in that particular domain.

 

[MU_Engineer]

Seriously, AMD has a CPU code-named Magny Cours? I was suddenly thinking of the French Grand Prix :lol:

Yes, they do have a CPU named Magny-Cours. AMD has been naming Opterons after Grand Prix racetracks and cities that have those racetracks ever since the Barcelona shipped.

- Budapest (quad-core 65 nm UP): the Hungagoring racetrack is very near Budapest
- Barcelona (quad-core 65 nm DP and MP): home to the Circuit de Catalunya
- Suzuka (quad-core 45 nm UP): Suzuka Circuit in Suzuka City, Japan
- Shanghai (quad-core 45 nm DP and MP): Shanghai F1 Circuit, Shanghai, China
- Istanbul (six-core Skt F 45 nm six-core DP and MP): F1 Istanbul Park, Istanbul, Turkey
- Magny-Cours (8 and 12-core UP/MP): Circuit de Nevers Magny-Cours, between Magny-Cours and Nevers, France

Upcoming CPUs:
- Lisbon (quad-core and six-core Skt C32 45 nm UP/DP): Lisbon, Spain- site of an F1 racetrack
- Valencia (six-core and 8-core Skt C32 32 nm UP/DP): Valencia Street Circuit, Valencia, Spain
- Interlagos (12-core and 16-core 32 nm DP/MP): Neighborhood in Sao Paulo, Brazil that contains the Autodromo Jose Carlos Pace

If you didnt know that why are you a mod?

Ooooooooo, somebody threw down the gauntlet

As I said before, Nehalem EX is what magny Cours should really worry about.

For the most part, no. The main competitor to Magny-Cours will be dual Xeon 5600 setups, since those are about the same price and DP servers outsell 4P servers by a wide margin. The Magny-Cours certainly does compete against the DP-only Xeon 6500, but I don't know how many of those Intel will sell as they are far more expensive than most of the Opteron 6100s and Xeon 5600s but I doubt are a whole lot faster (if they are faster at all.) I betcha that one will shake out to be two Xeon 6500s vs. four Opteron 6100s, since the price is about the same. I think Intel has conceded that argument by only releasing three Xeon 6500s, one of which is a horribly-crippled quad-core chip.

Yes, there will be some competition between smaller 4P Xeon 7500 setups and high-end 4P Magny-Cours systems, but I don't know how much since Intel is really hyping the fact that the Xeon 7500s scale up to 8 sockets and has big-iron RAS features (and a big-iron price), while AMD is emphasizing DP Magny-Cours systems (and gave them a DP price tag.)

Too bad Jenny got herself banned. Again. As many of us have tried to tell her & the other AMD fanbois, MC is too big, too slow and needs an arch update.

I bet "Jenny" really is a "Jack" based on his/her writing. It's not the first time some guy on the Internet has pretended to be a female before.

Magny-Cours is big, but it's an MCM and as Intel (correctly) said during the Pentium D Presler and Core 2 Quad days, MCMs allow you to make a lot more CPU for a lot less money than having one enormous die. MC's 346 mm^2 dies are still huge, but even that big chunk of silicon is a lot smaller than Beckton's single aircraft carrier-sized die. (I haven't seen die size numbers for Beckton, but eight cores and 24 MB of L3 cache on 45 nm is going to be a lot bigger than AMD's six cores and 6 MB L3 cache on 45 nm.) MC is a bit low-clocked, but it's very much in line with Beckton as far as clock speed is concerned- and it carries four more cores along with it as well. Westmere is a lot higher-clocked, but Westmere isn't as fast in many highly-multithreaded applications either. Now if Intel put two Westmeres in an MCM, AMD would be hurting...

I thought this conclusion was interesting:

On the other hand, as hinted before, Magny Cours and Lisbon Opterons may end up cornered between the high core speed Westmere EP and the many core and thread Nehalem EX, each with greater focus in that particular domain.

My prediction is that Intel is the one that is cornered. Intel will lose a lot of the lower-powered server market to AMD since the Lisbons (they go from $99 for a 2.2 GHz quad to ~$450 for a 2.9 GHz six-core) are far less expensive than equivalent Xeon 3400s and 3500s. Lower-end Westmeres will be undercut by the Lisbons, while the higher-end ones have to compete with Magny-Cours (which is still typically less-expensive!) The only Xeons that AMD doesn't really have a good answer to are the big 8P Xeon 7500 setups, but that market is small and I am sure IBM won't mind siccing 8-core POWER7s against them. Intel also is competing against themselves as the Xeon 7500s are growing to the size of and have many of the highly-touted RAS features of Intel's just-released-at-long-last Itanium 9300s. So I see Intel needing to drop prices on their CPUs significantly or make their own dual-die MCMs out of Westmeres to keep the market share they regained from AMD after AMD faltered with the Socket F gear.

 

[fazers_on_stun]

Yes, they do have a CPU named Magny-Cours. AMD has been naming Opterons after Grand Prix racetracks and cities that have those racetracks ever since the Barcelona shipped.

- Budapest (quad-core 65 nm UP): the Hungagoring racetrack is very near Budapest
- Barcelona (quad-core 65 nm DP and MP): home to the Circuit de Catalunya
- Suzuka (quad-core 45 nm UP): Suzuka Circuit in Suzuka City, Japan
- Shanghai (quad-core 45 nm DP and MP): Shanghai F1 Circuit, Shanghai, China
- Istanbul (six-core Skt F 45 nm six-core DP and MP): F1 Istanbul Park, Istanbul, Turkey
- Magny-Cours (8 and 12-core UP/MP): Circuit de Nevers Magny-Cours, between Magny-Cours and Nevers, France

Upcoming CPUs:
- Lisbon (quad-core and six-core Skt C32 45 nm UP/DP): Lisbon, Spain- site of an F1 racetrack
- Valencia (six-core and 8-core Skt C32 32 nm UP/DP): Valencia Street Circuit, Valencia, Spain
- Interlagos (12-core and 16-core 32 nm DP/MP): Neighborhood in Sao Paulo, Brazil that contains the Autodromo Jose Carlos Pace

And they also favor arabic star names - witness Thuban, Propus, etc. Wonder if the GF owners have anything to do with that..

I bet "Jenny" really is a "Jack" based on his/her writing. It's not the first time some guy on the Internet has pretended to be a female before.

Hmm, I disagree - seems to me that Jenny is actually a genuine female, esp. given her mood swings .

Magny-Cours is big, but it's an MCM and as Intel (correctly) said during the Pentium D Presler and Core 2 Quad days, MCMs allow you to make a lot more CPU for a lot less money than having one enormous die. MC's 346 mm^2 dies are still huge, but even that big chunk of silicon is a lot smaller than Beckton's single aircraft carrier-sized die. (I haven't seen die size numbers for Beckton, but eight cores and 24 MB of L3 cache on 45 nm is going to be a lot bigger than AMD's six cores and 6 MB L3 cache on 45 nm.) MC is a bit low-clocked, but it's very much in line with Beckton as far as clock speed is concerned- and it carries four more cores along with it as well. Westmere is a lot higher-clocked, but Westmere isn't as fast in many highly-multithreaded applications either. Now if Intel put two Westmeres in an MCM, AMD would be hurting...

Yes that's true given that MCM lets you harvest more chips per wafer, even with redundancy. But Intel could also just lower the Westmere price and that would put a big hurt on AMD, seeing as how their total die size is ~2.5x that of Intel's, using more expensive SOI.

My prediction is that Intel is the one that is cornered. Intel will lose a lot of the lower-powered server market to AMD since the Lisbons (they go from $99 for a 2.2 GHz quad to ~$450 for a 2.9 GHz six-core) are far less expensive than equivalent Xeon 3400s and 3500s. Lower-end Westmeres will be undercut by the Lisbons, while the higher-end ones have to compete with Magny-Cours (which is still typically less-expensive!) The only Xeons that AMD doesn't really have a good answer to are the big 8P Xeon 7500 setups, but that market is small and I am sure IBM won't mind siccing 8-core POWER7s against them. Intel also is competing against themselves as the Xeon 7500s are growing to the size of and have many of the highly-touted RAS features of Intel's just-released-at-long-last Itanium 9300s. So I see Intel needing to drop prices on their CPUs significantly or make their own dual-die MCMs out of Westmeres to keep the market share they regained from AMD after AMD faltered with the Socket F gear.

It'll be interesting to follow the iSuppli numbers, if & when they come out, concerning the marketshare segments. I note that Johan de Gelas seems to (at least publicly) take a more balanced approach to his predictions of success, after visiting AMDZone a few too many times ..

 

[BadTrip]

Ooooooooo, somebody threw down the gauntlet

I think that is a legitimate question.

 

[randomizer]

Because he's a BoM employee like Justin and Joe.

 

[fazers_on_stun]

Because he's a BoM employee like Justin and Joe.

As opposed to what - a BUM employee??

Sorry, couldn't resist..

 

[warmon6]

As opposed to what - a BUM employee??

Sorry, couldn't resist..

Do you have a joke for almost every thing? :lol:

 

[MU_Engineer]

And they also favor arabic star names - witness Thuban, Propus, etc. Wonder if the GF owners have anything to do with that..

Maybe, maybe not. AMD did say that the K10s are "Stars" cores, so the star names make sense, but I don't know how they pick individual code names.

Hmm, I disagree - seems to me that Jenny is actually a genuine female, esp. given her mood swings

There are also males who seem to have a "manstrual cycle" as well

Yes that's true given that MCM lets you harvest more chips per wafer, even with redundancy. But Intel could also just lower the Westmere price and that would put a big hurt on AMD, seeing as how their total die size is ~2.5x that of Intel's, using more expensive SOI.

The MC dies are bigger, but remember that AMD's 45 nm process is mature and Intel's 32 nm process is brand-new, so the cost advantage of Intel's 32 nm process may not be all that large. Yields are apparently excellent for AMD on 45 nm as AMD is turning out a bunch of big-die chips (MC, Istanbul, Thuban, Deneb) and they are reversing their financial situation. Apparently Intel may even be making 32 nm chips on 45 nm litho equipment and will have pretty low yields until they get proper 32 nm equipment, if the rumors I've heard are correct. That may explain why Intel's 32 nm chips are either tiny dual-core units or very expensive 6-cores and not mainstream quad-cores. Or that rumor may be completely wrong and Intel has good yields. I don't know for sure. But regardless, it will be interesting to see the numbers.

 

[fazers_on_stun]

The MC dies are bigger, but remember that AMD's 45 nm process is mature and Intel's 32 nm process is brand-new, so the cost advantage of Intel's 32 nm process may not be all that large. Yields are apparently excellent for AMD on 45 nm as AMD is turning out a bunch of big-die chips (MC, Istanbul, Thuban, Deneb) and they are reversing their financial situation. Apparently Intel may even be making 32 nm chips on 45 nm litho equipment and will have pretty low yields until they get proper 32 nm equipment, if the rumors I've heard are correct. That may explain why Intel's 32 nm chips are either tiny dual-core units or very expensive 6-cores and not mainstream quad-cores. Or that rumor may be completely wrong and Intel has good yields. I don't know for sure. But regardless, it will be interesting to see the numbers.

I saw that Theo Valich(?) article on GF's "perfect" wafers but IMO he interpreted perfect yields as meaning zero defects, so I'm not convinced that yields are excellent from the viewpoint of usable silicon real estate. After all, one could design a chip with 100% redundancy so that it is twice as large as one without any redundancy, yet overcome wafer & process defects, plus sell as X3 or X2 those chips that still fail as X4 despite all that redundancy (which also slows down the chip due to increased lead length).

But I would agree that AMDs 45nm has turned out far better than expected, and also due to the GF spinoff they have also sold off the equipment acquisition debt, so that they are likely out from under the amortization burden, whereas Intel has not yet with 32nm. Intel is not expected to achieve crossover until sometime this summer IIRC anyway, and I'd guess they don't want to hurt the 45nm quadcore sales since those are highly profitable by this time.

 

[Chad Boga]

Apparently Intel may even be making 32 nm chips on 45 nm litho equipment and will have pretty low yields until they get proper 32 nm equipment, if the rumors I've heard are correct. That may explain why Intel's 32 nm chips are either tiny dual-core units or very expensive 6-cores and not mainstream quad-cores. Or that rumor may be completely wrong and Intel has good yields. I don't know for sure. But regardless, it will be interesting to see the numbers.

How many 32nm factories do Intel have right now? When they switch over to 32nm, they don't convert all their fabs to 32nm, so they probably don't yet have the capacity to make all their chips in 32nm.

So when I look at what they are doing, it looks a hell of a lot like maximising their ROI by putting 32nm to best use.

Server and Mobile have the highest ASP's, so 32nm is being used there, and the 45nm quads are under no threat from AMD(we'll see if Thuban changes that), so they won't rush to change this.

 

[archibael]

Capacity dictates how much of a given product you can get out, but the product design/validation cycle is such that if a company suddenly tripled their 32nm capacity, it's not like they could suddenly "move" other products to 32nm, they could just build more of products that are already designed for 32nm. And the decision on which products are run on which process is usually made long before the process itself is finalized.

What this ends up meaning is that your product is GOING on that process whether it's healthy or not. You can delay the product until you work out the process issues or recover with a redesign for an older process, but the former leaves OEMs and customers screaming and the latter takes a lot of time and resources and typically will lose performance, increase costs or both. Someone in Finance probably does the return-on-investment calculation and makes the business case for which path to follow.

 

[r_manic]

If you didnt know that why are you a mod?

Well to be honest I've started to learn more about AMD offerings because of this forum And you don't need to know everything to keep the forum a nice and friendly place

Because he's a BoM employee like Justin and Joe.

And getting people to discuss about computer hardware is also a chance for me to learn new things. Like the AMD naming-scheme

As opposed to what - a BUM employee??

Sorry, couldn't resist..

:lol: I wish I really was a bum