Hi everyone - let me begin by saying I've seen posts that are similar to this but don't appear to address my direct concern.
I currently have an i7-6850k on an X99 board, and am about to upgrade. I purchased this to take advantage of (almost all) the available PCIe lanes from the CPU...not CPU + chipset...just the CPU, which had 40 lanes. Included in my setup are two M2 NVME PCIe drives that I think are taking full advantage of this setup on my motherboard (960 pros).
Has something fundamental changed over the last 3 years? I'm asking because when I look at the latest i7-9700k, it has less lanes. Whilst I understand that the CPU, plus the chipset lanes (on say a Z390) sum to 40 or more, aren't the lanes which are additional to the CPU just sharing the same Direct Media Interface (DMI) bandwidth? Or is something else happening in the background? Does this cause a bottleneck to the 970 pro speeds that I think I'll purchase for the M2 slots?
I'm not sure I'm asking the right question here, but with multiple GPUs, LAN and wifi cards will I be able to dedicate the entire bandwidth to my two M2 drives (not worried about the board shutting off SATA ports)?
I've looked at 4 YouTube videos on the basics of PCIe lanes vis-a-vis CPU and chipset, but I can't find an answer to the fundamental issue that the chipset might ultimately be dividing up the available bandwidth made available by the CPU. So did we go backwards in reducing the number of CPU lanes?? That can't be right? Right?
I currently have an i7-6850k on an X99 board, and am about to upgrade. I purchased this to take advantage of (almost all) the available PCIe lanes from the CPU...not CPU + chipset...just the CPU, which had 40 lanes. Included in my setup are two M2 NVME PCIe drives that I think are taking full advantage of this setup on my motherboard (960 pros).
Has something fundamental changed over the last 3 years? I'm asking because when I look at the latest i7-9700k, it has less lanes. Whilst I understand that the CPU, plus the chipset lanes (on say a Z390) sum to 40 or more, aren't the lanes which are additional to the CPU just sharing the same Direct Media Interface (DMI) bandwidth? Or is something else happening in the background? Does this cause a bottleneck to the 970 pro speeds that I think I'll purchase for the M2 slots?
I'm not sure I'm asking the right question here, but with multiple GPUs, LAN and wifi cards will I be able to dedicate the entire bandwidth to my two M2 drives (not worried about the board shutting off SATA ports)?
I've looked at 4 YouTube videos on the basics of PCIe lanes vis-a-vis CPU and chipset, but I can't find an answer to the fundamental issue that the chipset might ultimately be dividing up the available bandwidth made available by the CPU. So did we go backwards in reducing the number of CPU lanes?? That can't be right? Right?