PCH PCI Express Config & Processor PCI Express config (all 3.0)

Solution


PCH, or Platform Controller Hub, refers to the motherboard chipset - in the case of the LGA1151, the Z170, H170, H110, B150, etc.
Each chipset has a finite number of PCIe lanes (the Z170 having the greatest number of course), and manufacturers are allowed to allocate a certain number of these available lanes to features they want to have on their motherboards, e.g network, USB 2.0 or USB 3.0, SATA, M.2, etc., whilst other PCIe lanes' usage are fixed by Intel. This allocation is the 'PCH PCI Express configuration'. A buyer/user cannot change the allocation...


PCH, or Platform Controller Hub, refers to the motherboard chipset - in the case of the LGA1151, the Z170, H170, H110, B150, etc.
Each chipset has a finite number of PCIe lanes (the Z170 having the greatest number of course), and manufacturers are allowed to allocate a certain number of these available lanes to features they want to have on their motherboards, e.g network, USB 2.0 or USB 3.0, SATA, M.2, etc., whilst other PCIe lanes' usage are fixed by Intel. This allocation is the 'PCH PCI Express configuration'. A buyer/user cannot change the allocation except where the manufacturer provides some limited options in the BIOS.

Processor refers to the cpu, the central processing unit - Atom, Celeron, i3, i5, i7, Xeon. I am not familiar with AMD processors, but Intel has fixed the number of PCIe lanes available from their LGA115x processors at 16 and these are PCIe 3.0 lanes. An option is given to motherboard manufacturers to allocate these 16 PCIe 3.0 lanes from the processor to one or more PCIe slots that they provide on their motherboards. So if there are, say 2 PCIe x16 slots, and both are occupied, each slot will be auto-allocated 8 lanes. In looking at a manufacturer's tech specs, you will be able to see the allocation under 'Expansion Slots' in the manual, or summary specs. Descriptions like "x16/x8x8/x8x4x4" basically mean :
- if the first x16 slot is occupied (usually by the graphics card), and no other x16 slots are occupied, this device will receive all 16 PCIe 3.0 lanes from the cpu.
- if the first two x16 slots are occupied (eg. as in SLI or Crossfire setups), each slot will receive 8 PCIe 3.0 lanes from the cpu
- if all three x16 slots are occupied, the allocation is x8 to the first slot, x4 to the second, and x4 to the third (total = 16 PCIe 3.0 lanes).

A table of this allocation may also be provided to illustrate the allocation available to that motherboard as decided by the manufacturer.

Sometimes, in the BIOS, the manufacturer may allow the user to change the default number of lanes allocated to the 2nd, 3rd and/or 4th x16 slots. But, whatever the change, there can never be more than 16 PCIe lanes available from the LGA 115x range of processors. As a footnote, the LGA 2011-3 range of cpus have more lanes than 16, but you pay more for this luxury.

Hope that clears it up for you.
 
Solution
Yeah I am beginning to understand, thanks for the help.

I see on that Wikipedia page on the Q170 and Z170 down at the Processor PCI Express config 3.0 it says "Either 1 x16; 2 x8; or 1 x8 and 2 x4" so those are going from the CPU to the slots. The other boards just get 1 x16. So I can assume then if rereworded You get either 1x16 or 2x8 then a 3rd option of 1x8 and 2x4 together or one or the other.

Its just more options.

The other H110, B150, Q150 and H170 do not get an option to achieve 2x8, 1x8 and 2x4. All they get is 1 x16.
And these would be used for SSD's. What else would they be used for?
 

Yes, that is correct. Usually a quick way to check is to ensure they all add up to 16 because that's all the cpu has to allocate.


For these others, Intel has not allowed any other allocation from the cpu. Motherboards with these chipsets are only allowed 1x16 from the cpu, and motherboard manufacturers assign this to the 1st (and sometimes only) x16 slot. Any other slots or resources will get their lanes from the H110, B150, Q150 or H170 PCH - ssd, lan, audio, usb ports, etc. and communicate with the cpu via the DMI 3.0 interface.

Google for, say, Z170-chipset diagram or H170-chipset diagram and the various allowable allocations are shown with the cpu communicating with the PCH via the DMI 3.0 interface.