Pentium 4 dual-core details emerge

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Looks like Intel's dual-core P4 processors will be codenamed Paxville and
Dempsey.

Yousuf Khan
-----

http://www.geek.com/news/geeknews/2004Aug/bch20040817026514.htm

<quote>
Again, AMD is setting the bar for future processor technology, but this time
Intel is not going to be caught with their pants down. With the introduction
of 64-bit mainstream processors, Intel made two mistakes. First, they
underestimated the demand. And second, they weren't ready with a competing
product anywhere near the time of release. It seems that they take AMD and
its promises more seriously now, as they have proposed two dual-core Pentium
4 processors to compete with AMD's first dual-core processors in the middle
of 2005. The two processors, codenamed Paxville and Dempsey, will simply be
two Pentium 4 cores printed on one die, and neither will offer any
significant architectural improvement in the core. Paxville, which will be
released first, will be architecturally equivalent to a dual-Xeon setup,
which means it will have a relatively slow shared bus and a relatively
enormous cache. Given the size and thermal dissipation characteristics of
the Prescott, this dual-core behemoth will probably have reduced core and
bus clock rates, and will have little to boast about. On the other hand,
Dempsey brings an important feature to the table. Dempsey, which will be
released after Paxville, will sport a complex bus arbitration unit. This
will reduce the load on the bus and therefore allow Intel to scale the bus
clock frequency very high, which will still not solve the shared bus
problem, but will at least be an impressively efficient workaround. The
disadvantage to this method is that it will slightly increase the bus
latency, and that bus is used for all processor I/O and memory transactions
so there are millions of transactions per second, and even a small latency
can build up under those circumstances. Intel's biggest problem is that they
are sticking with the Pentium 4 core. They have learned that AMD is a force
to be reckoned with, and have prepared a response to AMD's initial dual-core
offering, but with the limitations imposed by the existing P4 architecture,
they will likely lag behind AMD performance.
</quote>
 
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With a massive AMD slant of course

"Yousuf Khan" <bbbl67@ezrs.com> wrote in message
news:IstUc.1768197$Ar.516369@twister01.bloor.is.net.cable.rogers.com...
> Looks like Intel's dual-core P4 processors will be codenamed Paxville and
> Dempsey.
>
> Yousuf Khan
> -----
>
> http://www.geek.com/news/geeknews/2004Aug/bch20040817026514.htm
>
> <quote>
> Again, AMD is setting the bar for future processor technology, but this
time
> Intel is not going to be caught with their pants down. With the
introduction
> of 64-bit mainstream processors, Intel made two mistakes. First, they
> underestimated the demand. And second, they weren't ready with a competing
> product anywhere near the time of release. It seems that they take AMD and
> its promises more seriously now, as they have proposed two dual-core
Pentium
> 4 processors to compete with AMD's first dual-core processors in the
middle
> of 2005. The two processors, codenamed Paxville and Dempsey, will simply
be
> two Pentium 4 cores printed on one die, and neither will offer any
> significant architectural improvement in the core. Paxville, which will be
> released first, will be architecturally equivalent to a dual-Xeon setup,
> which means it will have a relatively slow shared bus and a relatively
> enormous cache. Given the size and thermal dissipation characteristics of
> the Prescott, this dual-core behemoth will probably have reduced core and
> bus clock rates, and will have little to boast about. On the other hand,
> Dempsey brings an important feature to the table. Dempsey, which will be
> released after Paxville, will sport a complex bus arbitration unit. This
> will reduce the load on the bus and therefore allow Intel to scale the bus
> clock frequency very high, which will still not solve the shared bus
> problem, but will at least be an impressively efficient workaround. The
> disadvantage to this method is that it will slightly increase the bus
> latency, and that bus is used for all processor I/O and memory transaction
s
> so there are millions of transactions per second, and even a small latency
> can build up under those circumstances. Intel's biggest problem is that
they
> are sticking with the Pentium 4 core. They have learned that AMD is a
force
> to be reckoned with, and have prepared a response to AMD's initial
dual-core
> offering, but with the limitations imposed by the existing P4
architecture,
> they will likely lag behind AMD performance.
> </quote>
>
>
 
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Judd wrote:
> With a massive AMD slant of course

Can't help that Judd, Intel is in a catch-up mode, while AMD is rolling
through a pre-planned course. Anything Intel does now is going to seem
reactionary and comical.

Yousuf Khan
 

Ed

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Apr 1, 2004
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On Tue, 17 Aug 2004 23:48:08 GMT, "Yousuf Khan" <bbbl67@ezrs.com> wrote:

>Judd wrote:
>> With a massive AMD slant of course
>
>Can't help that Judd, Intel is in a catch-up mode, while AMD is rolling
>through a pre-planned course. Anything Intel does now is going to seem
>reactionary and comical.
>
> Yousuf Khan
>

AMD has been in catch-up mode since 1969. ;p
Ed
 
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Bitstring
<YOwUc.1770484$Ar.700531@twister01.bloor.is.net.cable.rogers.com>, from
the wonderful person Yousuf Khan <bbbl67@ezrs.com> said
>Judd wrote:
>> With a massive AMD slant of course
>
>Can't help that Judd, Intel is in a catch-up mode, while AMD is rolling
>through a pre-planned course. Anything Intel does now is going to seem
>reactionary and comical.

It's certainly comical that they apparently didn't have a good solution
for dual cores in the roadmap .. people have been talking about dual CPU
consumer PCs for years, if not decades, Win2k/Xp-Pro both support it,
Workstations have had it for years, Intel had the 'Hyperthreading' ball
in play .. and then suddenly appear surprised when it turns out that AMD
are planning to do the obvious (with what looks like it might be a
pretty slick solution).

I mean I've heard of taking your eye off the ball, but in this case it
seems like someone at Intel must have completely left the stadium.

--
GSV Three Minds in a Can
Outgoing Msgs are Turing Tested,and indistinguishable from human typing.
 
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GSV Three Minds in a Can wrote:
> I mean I've heard of taking your eye off the ball, but in this case it
> seems like someone at Intel must have completely left the stadium.

Interesting article written up today by Kevin Krewell, noting AMD's
resurgence:

http://www.mdronline.com/watch/watch_Issue.asp?Volname=Issue+%23179&on=1#item1

Basically goes through some of AMD's history, and it's various turning
points that shaped it. It seems to be relatively uncolored by propaganda.

Yousuf Khan
 
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Ed wrote:
> On Tue, 17 Aug 2004 23:48:08 GMT, "Yousuf Khan" <bbbl67@ezrs.com>
> wrote:
>
>> Judd wrote:
>>> With a massive AMD slant of course
>>
>> Can't help that Judd, Intel is in a catch-up mode, while AMD is
>> rolling through a pre-planned course. Anything Intel does now is
>> going to seem reactionary and comical.
>>
>> Yousuf Khan
>>
>
> AMD has been in catch-up mode since 1969. ;p
> Ed

Exactly, that's why Intel is not used to this position. Well, actually,
Intel was in a minor catch-up mode during the original Athlon days too, but
it did manage to catch up with P4 during that time, and even passed it for a
little while.

Yousuf Khan
 
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Yousuf Khan wrote:
> Looks like Intel's dual-core P4 processors will be codenamed Paxville and
> Dempsey.
>
> Yousuf Khan

I would think that the main problem with ANY dual core system is going
to be memory bandwidth. To address this you go faster or wider, and
Intel has been doing faster for a while. I would suspect that the
improved version of the concept would have a dual channel BIU to read
double wide data. This helps for large read blocks, not so much for
random access of small blocks.

That's what I think they mean by "complex bus arbitration unit" or
something similar. But none of this addresses the pipeline length, which
would benefit from better prefetch and branch prediction.

[BIU - bus interface unit, sorry]The newsgroup is _not_ for the purpose
of posting binaries, requesting

> -----
>
> http://www.geek.com/news/geeknews/2004Aug/bch20040817026514.htm
>
> <quote>
> Again, AMD is setting the bar for future processor technology, but this time
> Intel is not going to be caught with their pants down. With the introduction
> of 64-bit mainstream processors, Intel made two mistakes. First, they
> underestimated the demand. And second, they weren't ready with a competing
> product anywhere near the time of release. It seems that they take AMD and
> its promises more seriously now, as they have proposed two dual-core Pentium
> 4 processors to compete with AMD's first dual-core processors in the middle
> of 2005. The two processors, codenamed Paxville and Dempsey, will simply be
> two Pentium 4 cores printed on one die, and neither will offer any
> significant architectural improvement in the core. Paxville, which will be
> released first, will be architecturally equivalent to a dual-Xeon setup,
> which means it will have a relatively slow shared bus and a relatively
> enormous cache. Given the size and thermal dissipation characteristics of
> the Prescott, this dual-core behemoth will probably have reduced core and
> bus clock rates, and will have little to boast about. On the other hand,
> Dempsey brings an important feature to the table. Dempsey, which will be
> released after Paxville, will sport a complex bus arbitration unit. This
> will reduce the load on the bus and therefore allow Intel to scale the bus
> clock frequency very high, which will still not solve the shared bus
> problem, but will at least be an impressively efficient workaround. The
> disadvantage to this method is that it will slightly increase the bus
> latency, and that bus is used for all processor I/O and memory transactions
> so there are millions of transactions per second, and even a small latency
> can build up under those circumstances. Intel's biggest problem is that they
> are sticking with the Pentium 4 core. They have learned that AMD is a force
> to be reckoned with, and have prepared a response to AMD's initial dual-core
> offering, but with the limitations imposed by the existing P4 architecture,
> they will likely lag behind AMD performance.
> </quote>

Interesting that they didn't add a few more arithmetic units and step up
the performance of HT.

--
-bill davidsen (davidsen@tmr.com)
"The secret to procrastination is to put things off until the
last possible moment - but no longer" -me